diff options
| author | Avi Kivity <avi@redhat.com> | 2012-08-05 13:25:10 +0300 |
|---|---|---|
| committer | Avi Kivity <avi@redhat.com> | 2012-08-05 13:25:10 +0300 |
| commit | fe56097b23b1303b894eefd91582e4a64247d03f (patch) | |
| tree | 4b3ab60eb19e8cfe2884e2da66dd4e4e25ae2274 /Documentation/devicetree/bindings/mips/cavium/ciu2.txt | |
| parent | e115676e042f4d9268c6b6d8cb7dc962aa6cfd7d (diff) | |
| parent | e7882d6c40874a5b5033ca85f7508a602a60b662 (diff) | |
Merge remote-tracking branch 'upstream' into next
- bring back critical fixes (esp. aa67f6096c19bc)
- provide an updated base for development
* upstream: (4334 commits)
missed mnt_drop_write() in do_dentry_open()
UBIFS: nuke pdflush from comments
gfs2: nuke pdflush from comments
drbd: nuke pdflush from comments
nilfs2: nuke write_super from comments
hfs: nuke write_super from comments
vfs: nuke pdflush from comments
jbd/jbd2: nuke write_super from comments
btrfs: nuke pdflush from comments
btrfs: nuke write_super from comments
ext4: nuke pdflush from comments
ext4: nuke write_super from comments
ext3: nuke write_super from comments
Documentation: fix the VM knobs descritpion WRT pdflush
Documentation: get rid of write_super
vfs: kill write_super and sync_supers
ACPI processor: Fix tick_broadcast_mask online/offline regression
ACPI: Only count valid srat memory structures
ACPI: Untangle a return statement for better readability
Linux 3.6-rc1
...
Signed-off-by: Avi Kivity <avi@redhat.com>
Diffstat (limited to 'Documentation/devicetree/bindings/mips/cavium/ciu2.txt')
| -rw-r--r-- | Documentation/devicetree/bindings/mips/cavium/ciu2.txt | 27 |
1 files changed, 27 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/mips/cavium/ciu2.txt b/Documentation/devicetree/bindings/mips/cavium/ciu2.txt new file mode 100644 index 000000000000..0ec7ba8bbbcb --- /dev/null +++ b/Documentation/devicetree/bindings/mips/cavium/ciu2.txt @@ -0,0 +1,27 @@ +* Central Interrupt Unit + +Properties: +- compatible: "cavium,octeon-6880-ciu2" + + Compatibility with 68XX SOCs. + +- interrupt-controller: This is an interrupt controller. + +- reg: The base address of the CIU's register bank. + +- #interrupt-cells: Must be <2>. The first cell is the bank within + the CIU and may have a value between 0 and 63. The second cell is + the bit within the bank and may also have a value between 0 and 63. + +Example: + interrupt-controller@1070100000000 { + compatible = "cavium,octeon-6880-ciu2"; + interrupt-controller; + /* Interrupts are specified by two parts: + * 1) Controller register (0..63) + * 2) Bit within the register (0..63) + */ + #address-cells = <0>; + #interrupt-cells = <2>; + reg = <0x10701 0x00000000 0x0 0x4000000>; + }; |