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authorPaul Cercueil <paul@crapouillou.net>2020-04-13 17:26:23 +0200
committerRob Herring <robh@kernel.org>2020-04-20 17:22:22 -0500
commit63d35f6cf31f68db7d75bce827a7b59710276533 (patch)
tree994f6d0806e410ade21453fa0577389e10f6c20d /Documentation/devicetree/bindings/dma
parent2ebeea2b8906e8e68154d0a7518c0fbad55d9b93 (diff)
dt-bindings: dma: Convert jz4740-dma doc to YAML
Convert the textual documentation for the Ingenic SoCs DMA Controller devicetree binding to YAML. Signed-off-by: Paul Cercueil <paul@crapouillou.net> Signed-off-by: Rob Herring <robh@kernel.org>
Diffstat (limited to 'Documentation/devicetree/bindings/dma')
-rw-r--r--Documentation/devicetree/bindings/dma/ingenic,dma.yaml80
-rw-r--r--Documentation/devicetree/bindings/dma/jz4780-dma.txt64
2 files changed, 80 insertions, 64 deletions
diff --git a/Documentation/devicetree/bindings/dma/ingenic,dma.yaml b/Documentation/devicetree/bindings/dma/ingenic,dma.yaml
new file mode 100644
index 000000000000..92794c500589
--- /dev/null
+++ b/Documentation/devicetree/bindings/dma/ingenic,dma.yaml
@@ -0,0 +1,80 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/dma/ingenic,dma.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Ingenic SoCs DMA Controller DT bindings
+
+maintainers:
+ - Paul Cercueil <paul@crapouillou.net>
+
+allOf:
+ - $ref: "dma-controller.yaml#"
+
+properties:
+ compatible:
+ enum:
+ - ingenic,jz4740-dma
+ - ingenic,jz4725b-dma
+ - ingenic,jz4770-dma
+ - ingenic,jz4780-dma
+ - ingenic,x1000-dma
+ - ingenic,x1830-dma
+
+ reg:
+ items:
+ - description: Channel-specific registers
+ - description: System control registers
+
+ interrupts:
+ maxItems: 1
+
+ clocks:
+ maxItems: 1
+
+ "#dma-cells":
+ const: 2
+ description: >
+ DMA clients must use the format described in dma.txt, giving a phandle
+ to the DMA controller plus the following 2 integer cells:
+
+ - Request type: The DMA request type for transfers to/from the
+ device on the allocated channel, as defined in the SoC documentation.
+
+ - Channel: If set to 0xffffffff, any available channel will be allocated
+ for the client. Otherwise, the exact channel specified will be used.
+ The channel should be reserved on the DMA controller using the
+ ingenic,reserved-channels property.
+
+ ingenic,reserved-channels:
+ $ref: /schemas/types.yaml#definitions/uint32
+ description: >
+ Bitmask of channels to reserve for devices that need a specific
+ channel. These channels will only be assigned when explicitely
+ requested by a client. The primary use for this is channels 0 and
+ 1, which can be configured to have special behaviour for NAND/BCH
+ when using programmable firmware.
+
+required:
+ - compatible
+ - reg
+ - interrupts
+ - clocks
+
+examples:
+ - |
+ #include <dt-bindings/clock/jz4780-cgu.h>
+ dma: dma-controller@13420000 {
+ compatible = "ingenic,jz4780-dma";
+ reg = <0x13420000 0x400>, <0x13421000 0x40>;
+
+ interrupt-parent = <&intc>;
+ interrupts = <10>;
+
+ clocks = <&cgu JZ4780_CLK_PDMA>;
+
+ #dma-cells = <2>;
+
+ ingenic,reserved-channels = <0x3>;
+ };
diff --git a/Documentation/devicetree/bindings/dma/jz4780-dma.txt b/Documentation/devicetree/bindings/dma/jz4780-dma.txt
deleted file mode 100644
index 3459e77be294..000000000000
--- a/Documentation/devicetree/bindings/dma/jz4780-dma.txt
+++ /dev/null
@@ -1,64 +0,0 @@
-* Ingenic XBurst DMA Controller
-
-Required properties:
-
-- compatible: Should be one of:
- * ingenic,jz4740-dma
- * ingenic,jz4725b-dma
- * ingenic,jz4770-dma
- * ingenic,jz4780-dma
- * ingenic,x1000-dma
- * ingenic,x1830-dma
-- reg: Should contain the DMA channel registers location and length, followed
- by the DMA controller registers location and length.
-- interrupts: Should contain the interrupt specifier of the DMA controller.
-- clocks: Should contain a clock specifier for the JZ4780/X1000/X1830 PDMA
- clock.
-- #dma-cells: Must be <2>. Number of integer cells in the dmas property of
- DMA clients (see below).
-
-Optional properties:
-
-- ingenic,reserved-channels: Bitmask of channels to reserve for devices that
- need a specific channel. These channels will only be assigned when explicitly
- requested by a client. The primary use for this is channels 0 and 1, which
- can be configured to have special behaviour for NAND/BCH when using
- programmable firmware.
-
-Example:
-
-dma: dma-controller@13420000 {
- compatible = "ingenic,jz4780-dma";
- reg = <0x13420000 0x400
- 0x13421000 0x40>;
-
- interrupt-parent = <&intc>;
- interrupts = <10>;
-
- clocks = <&cgu JZ4780_CLK_PDMA>;
-
- #dma-cells = <2>;
-
- ingenic,reserved-channels = <0x3>;
-};
-
-DMA clients must use the format described in dma.txt, giving a phandle to the
-DMA controller plus the following 2 integer cells:
-
-1. Request type: The DMA request type for transfers to/from the device on
- the allocated channel, as defined in the SoC documentation.
-
-2. Channel: If set to 0xffffffff, any available channel will be allocated for
- the client. Otherwise, the exact channel specified will be used. The channel
- should be reserved on the DMA controller using the ingenic,reserved-channels
- property.
-
-Example:
-
-uart0: serial@10030000 {
- ...
- dmas = <&dma 0x14 0xffffffff
- &dma 0x15 0xffffffff>;
- dma-names = "tx", "rx";
- ...
-};