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authorJordan Crouse <jcrouse@codeaurora.org>2019-04-19 13:46:16 -0600
committerRob Clark <robdclark@chromium.org>2019-04-21 07:37:17 -0700
commitb55ee6b243bd2743b9cb20b6aa812091748c4304 (patch)
tree361fa71cee97f28425fffd35beec3907984f1d2c /Documentation/devicetree/bindings/display/msm
parentabccb9fe326743b72c8099d5cc039e9038bc50da (diff)
dt-bindings: drm/msm/gpu: Document a5xx / a6xx zap shader region
Describe the zap-shader node that defines a reserved memory region to store the zap shader. Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org> Signed-off-by: Rob Clark <robdclark@chromium.org>
Diffstat (limited to 'Documentation/devicetree/bindings/display/msm')
-rw-r--r--Documentation/devicetree/bindings/display/msm/gpu.txt7
1 files changed, 7 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/display/msm/gpu.txt b/Documentation/devicetree/bindings/display/msm/gpu.txt
index c04614c63ea9..2b8fd26c43b0 100644
--- a/Documentation/devicetree/bindings/display/msm/gpu.txt
+++ b/Documentation/devicetree/bindings/display/msm/gpu.txt
@@ -27,6 +27,9 @@ Required properties:
- qcom,gmu: For GMU attached devices a phandle to the GMU device that will
control the power for the GPU. Applicable targets:
- qcom,adreno-630.2
+- zap-shader: For a5xx and a6xx devices this node contains a memory-region that
+ points to reserved memory to store the zap shader that can be used to help
+ bring the GPU out of secure mode.
Example 3xx/4xx/a5xx:
@@ -75,5 +78,9 @@ Example a6xx (with GMU):
interconnects = <&rsc_hlos MASTER_GFX3D &rsc_hlos SLAVE_EBI1>;
qcom,gmu = <&gmu>;
+
+ zap-shader {
+ memory-region = <&zap_shader_region>;
+ };
};
};