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authorPrashant Gaikwad <pgaikwad@nvidia.com>2013-04-04 14:35:04 +0530
committerStephen Warren <swarren@nvidia.com>2013-04-04 16:08:46 -0600
commit82ce742140f32394cc5be75f1c98cdbbff284582 (patch)
tree09f75d62dc67f48ced53ab05f83dcc74c4854baa /Documentation/devicetree/bindings/clock/nvidia,tegra20-car.txt
parentce910686f814fe220f4e55ecca5cfdea7082b3de (diff)
clk: tegra: Fix cdev1 and cdev2 IDs
Correct IDs for cdev1 and cdev2 are 94 and 93 respectively. Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com> [swarren: split into separate driver and device-tree patches] Signed-off-by: Stephen Warren <swarren@nvidia.com>
Diffstat (limited to 'Documentation/devicetree/bindings/clock/nvidia,tegra20-car.txt')
-rw-r--r--Documentation/devicetree/bindings/clock/nvidia,tegra20-car.txt4
1 files changed, 2 insertions, 2 deletions
diff --git a/Documentation/devicetree/bindings/clock/nvidia,tegra20-car.txt b/Documentation/devicetree/bindings/clock/nvidia,tegra20-car.txt
index 0921fac73528..e885680f6b45 100644
--- a/Documentation/devicetree/bindings/clock/nvidia,tegra20-car.txt
+++ b/Documentation/devicetree/bindings/clock/nvidia,tegra20-car.txt
@@ -120,8 +120,8 @@ Required properties :
90 clk_d
91 unassigned
92 sus
- 93 cdev1
- 94 cdev2
+ 93 cdev2
+ 94 cdev1
95 unassigned
96 uart2