diff options
author | Anson Huang <Anson.Huang@nxp.com> | 2020-05-13 08:11:22 +0800 |
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committer | Rob Herring <robh@kernel.org> | 2020-05-27 19:30:24 -0600 |
commit | f41610309affd8a077c54b0949b7dcd79b0bc20b (patch) | |
tree | f2289a6bd7dce3ecfcea9f811b4681ce983c0b84 /Documentation/devicetree/bindings/clock/imx6sl-clock.yaml | |
parent | b9e267524b16806fdfcf9e4d31f7f5d5e4f3a35d (diff) |
dt-bindings: clock: Convert i.MX6SL clock to json-schema
Convert the i.MX6SL clock binding to DT schema format using json-schema.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Acked-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Rob Herring <robh@kernel.org>
Diffstat (limited to 'Documentation/devicetree/bindings/clock/imx6sl-clock.yaml')
-rw-r--r-- | Documentation/devicetree/bindings/clock/imx6sl-clock.yaml | 48 |
1 files changed, 48 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/clock/imx6sl-clock.yaml b/Documentation/devicetree/bindings/clock/imx6sl-clock.yaml new file mode 100644 index 000000000000..135568c46350 --- /dev/null +++ b/Documentation/devicetree/bindings/clock/imx6sl-clock.yaml @@ -0,0 +1,48 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/clock/imx6sl-clock.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Clock bindings for Freescale i.MX6 SoloLite + +maintainers: + - Anson Huang <Anson.Huang@nxp.com> + +properties: + compatible: + const: fsl,imx6sl-ccm + + reg: + maxItems: 1 + + interrupts: + description: CCM provides 2 interrupt requests, request 1 is to generate + interrupt for frequency or mux change, request 2 is to generate + interrupt for oscillator read or PLL lock. + items: + - description: CCM interrupt request 1 + - description: CCM interrupt request 2 + maxItems: 2 + + '#clock-cells': + const: 1 + +required: + - compatible + - reg + - interrupts + - '#clock-cells' + +examples: + # Clock Control Module node: + - | + #include <dt-bindings/interrupt-controller/arm-gic.h> + + clock-controller@20c4000 { + compatible = "fsl,imx6sl-ccm"; + reg = <0x020c4000 0x4000>; + interrupts = <0 87 IRQ_TYPE_LEVEL_HIGH>, + <0 88 IRQ_TYPE_LEVEL_HIGH>; + #clock-cells = <1>; + }; |