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authorAmit Nischal <anischal@codeaurora.org>2018-05-07 16:20:18 +0530
committerStephen Boyd <sboyd@kernel.org>2018-05-08 11:22:55 -0700
commit7ef6f11887bd3676fc64517ca685f613d7f230ef (patch)
tree9697c05f48220548b29aac32bdc322d8cf911f77 /Documentation/devicetree/bindings/clock/exynos7-clock.txt
parent7d99ced8f4c65267836db69ec0790e878ef11b3b (diff)
clk: qcom: Configure the RCGs to a safe source as needed
For some root clock generators, there could be child branches which are controlled by an entity other than application processor subsystem. For such RCGs, as per application processor subsystem clock driver, all of its downstream clocks are disabled and RCG is in disabled state but in reality downstream clocks can be left enabled before. So in this scenario, when RCG is disabled as per clock driver's point of view and when rate scaling request comes before downstream clock enable request, then RCG fails to update its configuration because in reality RCG is on and it expects its new source to already be in enable state but in reality new source is off. In order to avoid having the RCG to go into an invalid state, add support to update the CFG, M, N and D registers during set_rate() without configuration update and defer the actual RCG configuration update to be done during clk_enable() as at this point of time, both its new parent and safe source will be already enabled and RCG can safely switch to new parent. During clk_disable() request, configure it to safe source as both its parents, safe source and current parent will be enabled and RCG can safely execute a switch. Signed-off-by: Taniya Das <tdas@codeaurora.org> Signed-off-by: Amit Nischal <anischal@codeaurora.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
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