diff options
author | Yingjoe Chen <yingjoe.chen@mediatek.com> | 2014-11-25 16:04:22 +0800 |
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committer | Jason Cooper <jason@lakedaemon.net> | 2014-11-26 15:55:18 +0000 |
commit | f4e27e30b3663a8652746d1c7d1649a5fa8c0e6c (patch) | |
tree | 63defe8568b981deb46fc7b7c39c296cc21a66ca /Documentation/devicetree/bindings/arm/mediatek | |
parent | 5fe3bba3088c4efab32a18649643b5075755b4b3 (diff) |
irqchip: mtk-sysirq: dt-bindings: Add bindings for mediatek sysirq
Add binding documentation for Mediatek SoC SYSIRQ.
Signed-off-by: Yingjoe Chen <yingjoe.chen@mediatek.com>
Link: https://lkml.kernel.org/r/1416902662-19281-5-git-send-email-yingjoe.chen@mediatek.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Diffstat (limited to 'Documentation/devicetree/bindings/arm/mediatek')
-rw-r--r-- | Documentation/devicetree/bindings/arm/mediatek/mediatek,sysirq.txt | 28 |
1 files changed, 28 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,sysirq.txt b/Documentation/devicetree/bindings/arm/mediatek/mediatek,sysirq.txt new file mode 100644 index 000000000000..d680b07ec6e8 --- /dev/null +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,sysirq.txt @@ -0,0 +1,28 @@ +Mediatek 65xx/81xx sysirq + +Mediatek SOCs sysirq support controllable irq inverter for each GIC SPI +interrupt. + +Required properties: +- compatible: should be one of: + "mediatek,mt8135-sysirq" + "mediatek,mt8127-sysirq" + "mediatek,mt6589-sysirq" + "mediatek,mt6582-sysirq" + "mediatek,mt6577-sysirq" +- interrupt-controller : Identifies the node as an interrupt controller +- #interrupt-cells : Use the same format as specified by GIC in + Documentation/devicetree/bindings/arm/gic.txt +- interrupt-parent: phandle of irq parent for sysirq. The parent must + use the same interrupt-cells format as GIC. +- reg: Physical base address of the intpol registers and length of memory + mapped region. + +Example: + sysirq: interrupt-controller@10200100 { + compatible = "mediatek,mt6589-sysirq", "mediatek,mt6577-sysirq"; + interrupt-controller; + #interrupt-cells = <3>; + interrupt-parent = <&gic>; + reg = <0 0x10200100 0 0x1c>; + }; |