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| author | Anup Patel <anup.patel@wdc.com> | 2020-06-01 14:45:41 +0530 |
|---|---|---|
| committer | Palmer Dabbelt <palmerdabbelt@google.com> | 2020-06-09 19:11:22 -0700 |
| commit | 033a65de7eced89f62d2cd166b1ee2d33af4f1e4 (patch) | |
| tree | 793a3f57cb982fad7b31cc64df4fe73c1538a46e /Documentation/arm64/amu.rst | |
| parent | 6b7ce8927b5a4d739670d4dc0de301f2abfd9a5c (diff) | |
clocksource/drivers/timer-riscv: Use per-CPU timer interrupt
Instead of directly calling RISC-V timer interrupt handler from
RISC-V local interrupt conntroller driver, this patch implements
RISC-V timer interrupt as a per-CPU interrupt using per-CPU APIs
of Linux IRQ subsystem.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
Reviewed-by: Marc Zyngier <maz@kernel.org>
Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>
Diffstat (limited to 'Documentation/arm64/amu.rst')
0 files changed, 0 insertions, 0 deletions