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authorAxel Lin <axel.lin@ingics.com>2016-05-31 17:26:00 +0800
committerMark Brown <broonie@kernel.org>2016-05-31 16:38:01 +0100
commitc714a588fc39dc8c8f70014f5691217717983fb3 (patch)
tree141938bca2f2372640f3f34a88714c58d8ebe00b /Documentation/EDID/edid.S
parent1a695a905c18548062509178b98bc91e67510864 (diff)
regulator: tps51632: Fix setting ramp delay
According to the datasheet: SLEW Register(Address = 07h) b7 b6 b5 b4 b3 b2 b1 b0 48mV/us 42mV/us 36mV/us 30mV/us 24mV/us 18mV/us 12mV/us 6mV/us Current code does not set correct slew rate in some cases: e.g. Assume ramp_delay is 10000, current code sets slew register to 6mV/us. Fix the logic to set slew register. Signed-off-by: Axel Lin <axel.lin@ingics.com> Acked-by: Laxman Dewangan <ldewangan@nvidia.com> Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'Documentation/EDID/edid.S')
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