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authorSandeep Paulraj <s-paulraj@ti.com>2009-08-27 16:39:43 -0400
committerKevin Hilman <khilman@deeprootsystems.com>2009-11-25 10:21:17 -0800
commited16067205d79aef6ab885a662380fd1dad3ff6a (patch)
treeddc7b73a30eb06ec9042497aca223ae2bf00a438 /CREDITS
parenteb5ba378bc0ed3f426edee3af7fdcd215a505026 (diff)
DaVinci: DM365: Correct USB parent clock
The parent clock for the USB source clock is actually PLL1 aux clock, not PLL2 sysclk1. Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
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