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authorEvan Quan <evan.quan@amd.com>2018-08-10 14:27:56 +0800
committerAlex Deucher <alexander.deucher@amd.com>2018-08-27 11:10:38 -0500
commitff50e15b00b0d107df58d0f95065015196015543 (patch)
treee86861ab82190915f3293adaa4c6b206decdb26b
parentefa7ac67a80f31a35c6c3e2b40841439bf107fa2 (diff)
drm/amd/powerplay: added voltage boot time calibration
Run AFLL BTC after upload pptable and before enabling all smu features. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
-rw-r--r--drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c10
1 files changed, 10 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c
index d7c4334da250..fb32b28afa66 100644
--- a/drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c
+++ b/drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c
@@ -756,6 +756,11 @@ static int vega20_set_allowed_featuresmask(struct pp_hwmgr *hwmgr)
return 0;
}
+static int vega20_run_btc_afll(struct pp_hwmgr *hwmgr)
+{
+ return smum_send_msg_to_smc(hwmgr, PPSMC_MSG_RunAfllBtc);
+}
+
static int vega20_enable_all_smu_features(struct pp_hwmgr *hwmgr)
{
struct vega20_hwmgr *data =
@@ -1391,6 +1396,11 @@ static int vega20_enable_dpm_tasks(struct pp_hwmgr *hwmgr)
"[EnableDPMTasks] Failed to initialize SMC table!",
return result);
+ result = vega20_run_btc_afll(hwmgr);
+ PP_ASSERT_WITH_CODE(!result,
+ "[EnableDPMTasks] Failed to run btc afll!",
+ return result);
+
result = vega20_enable_all_smu_features(hwmgr);
PP_ASSERT_WITH_CODE(!result,
"[EnableDPMTasks] Failed to enable all smu features!",