diff options
author | Qii Wang <qii.wang@mediatek.com> | 2021-05-27 20:04:04 +0800 |
---|---|---|
committer | Wolfram Sang <wsa@kernel.org> | 2021-05-28 10:13:07 +0200 |
commit | fed1bd51a504eb96caa38b4f13ab138fc169ea75 (patch) | |
tree | 2cc001ac183f789f2690ebd21eb4a9924db18f1d | |
parent | e4d8716c3dcec47f1557024add24e1f3c09eb24b (diff) |
i2c: mediatek: Disable i2c start_en and clear intr_stat brfore reset
The i2c controller driver do dma reset after transfer timeout,
but sometimes dma reset will trigger an unexpected DMA_ERR irq.
It will cause the i2c controller to continuously send interrupts
to the system and cause soft lock-up. So we need to disable i2c
start_en and clear intr_stat to stop i2c controller before dma
reset when transfer timeout.
Fixes: aafced673c06("i2c: mediatek: move dma reset before i2c reset")
Signed-off-by: Qii Wang <qii.wang@mediatek.com>
Signed-off-by: Wolfram Sang <wsa@kernel.org>
-rw-r--r-- | drivers/i2c/busses/i2c-mt65xx.c | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/drivers/i2c/busses/i2c-mt65xx.c b/drivers/i2c/busses/i2c-mt65xx.c index 5ddfa4e56ee2..4e9fb6b44436 100644 --- a/drivers/i2c/busses/i2c-mt65xx.c +++ b/drivers/i2c/busses/i2c-mt65xx.c @@ -479,6 +479,11 @@ static void mtk_i2c_clock_disable(struct mtk_i2c *i2c) static void mtk_i2c_init_hw(struct mtk_i2c *i2c) { u16 control_reg; + u16 intr_stat_reg; + + mtk_i2c_writew(i2c, I2C_CHN_CLR_FLAG, OFFSET_START); + intr_stat_reg = mtk_i2c_readw(i2c, OFFSET_INTR_STAT); + mtk_i2c_writew(i2c, intr_stat_reg, OFFSET_INTR_STAT); if (i2c->dev_comp->apdma_sync) { writel(I2C_DMA_WARM_RST, i2c->pdmabase + OFFSET_RST); |