diff options
| author | Vivek Gautam <gautam.vivek@samsung.com> | 2014-05-16 06:38:01 +0900 |
|---|---|---|
| committer | Kukjin Kim <kgene.kim@samsung.com> | 2014-05-19 23:13:53 +0900 |
| commit | f070267b5fc17752d0dd4dc5784cd3cb57b6d92b (patch) | |
| tree | a7ce9660efc73b9513ef45583b16f5a69959918e | |
| parent | 3cb7d1cdbec054ac08e7166578d8a53cbc429c33 (diff) | |
ARM: dts: Enable support for DWC3 controller for exynos5420
Add device tree nodes for DWC3 controller present on
Exynos 5420 SoC, to enable support for USB 3.0.
Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com>
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
| -rw-r--r-- | arch/arm/boot/dts/exynos5420.dtsi | 34 |
1 files changed, 34 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/exynos5420.dtsi b/arch/arm/boot/dts/exynos5420.dtsi index 31d99b0a2022..677a4e64620d 100644 --- a/arch/arm/boot/dts/exynos5420.dtsi +++ b/arch/arm/boot/dts/exynos5420.dtsi @@ -758,6 +758,23 @@ samsung,power-domain = <&g2d_pd>; }; + usbdrd3_0: usb@12000000 { + compatible = "samsung,exynos5250-dwusb3"; + clocks = <&clock CLK_USBD300>; + clock-names = "usbdrd30"; + #address-cells = <1>; + #size-cells = <1>; + ranges; + + dwc3 { + compatible = "snps,dwc3"; + reg = <0x12000000 0x10000>; + interrupts = <0 72 0>; + phys = <&usbdrd_phy0 0>, <&usbdrd_phy0 1>; + phy-names = "usb2-phy", "usb3-phy"; + }; + }; + usbdrd_phy0: phy@12100000 { compatible = "samsung,exynos5420-usbdrd-phy"; reg = <0x12100000 0x100>; @@ -767,6 +784,23 @@ #phy-cells = <1>; }; + usbdrd3_1: usb@12400000 { + compatible = "samsung,exynos5250-dwusb3"; + clocks = <&clock CLK_USBD301>; + clock-names = "usbdrd30"; + #address-cells = <1>; + #size-cells = <1>; + ranges; + + dwc3 { + compatible = "snps,dwc3"; + reg = <0x12400000 0x10000>; + interrupts = <0 73 0>; + phys = <&usbdrd_phy1 0>, <&usbdrd_phy1 1>; + phy-names = "usb2-phy", "usb3-phy"; + }; + }; + usbdrd_phy1: phy@12500000 { compatible = "samsung,exynos5420-usbdrd-phy"; reg = <0x12500000 0x100>; |