diff options
author | Cyrill Gorcunov <gorcunov@openvz.org> | 2010-05-18 17:29:14 +0800 |
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committer | Ingo Molnar <mingo@elte.hu> | 2010-05-18 12:05:20 +0200 |
commit | ef4f30f54e265c2f6f9ac9eda4db158a4e16050b (patch) | |
tree | 646ae9e3e984d1d46b243ab93f31140153c63d1f | |
parent | 0db1a7bc00216a981d0b7056627ad8682f4f0636 (diff) |
perf, x86: P4 PMU -- fix typo in unflagged NMI handling
Tested-by: Lin Ming <ming.m.lin@intel.com>
Signed-off-by: Cyrill Gorcunov <gorcunov@openvz.org>
Cc: Cyrill Gorcunov <gorcunov@gmail.com>
LKML-Reference: <1274174954.22793.17.camel@minggr.sh.intel.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
-rw-r--r-- | arch/x86/kernel/cpu/perf_event_p4.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/x86/kernel/cpu/perf_event_p4.c b/arch/x86/kernel/cpu/perf_event_p4.c index 02f072830237..87e1803e67a6 100644 --- a/arch/x86/kernel/cpu/perf_event_p4.c +++ b/arch/x86/kernel/cpu/perf_event_p4.c @@ -473,7 +473,7 @@ static inline int p4_pmu_clear_cccr_ovf(struct hw_perf_event *hwc) rdmsr(hwc->config_base + hwc->idx, low, high); /* we need to check high bit for unflagged overflows */ - if ((low & P4_CCCR_OVF) || (high & (1 << 31))) { + if ((low & P4_CCCR_OVF) || !(high & (1 << 31))) { overflow = 1; (void)checking_wrmsrl(hwc->config_base + hwc->idx, ((u64)low) & ~P4_CCCR_OVF); |