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authorSubash Patel <subash.rp@samsung.com>2013-07-16 12:42:13 +0900
committerKukjin Kim <kgene.kim@samsung.com>2013-07-16 12:42:13 +0900
commitea2761763739619ca49602d891ec3ffb33ffc71b (patch)
treebec2580276cf4622dfb62a3572041403bfcbd5ba
parente085cad6c653e20e213a662ef32fb6191ae0197d (diff)
ARM: EXYNOS: change the PHYSMEM_BITS and SECTION_SIZE
On EXYNOS5440 there is DRAM on the 36-bit address range. Hence this patch converts the MAX_PHYSMEM_BITS macro to 36 if LPAE is enabled for the ARM architecture. The conventional section size on EXYNOS is 256M due to sparsemem. Since EXYNOS5440 has memory in multiples of 1G in 32-bit and 36-bit range, this has now been modified to 31. Signed-off-by: Subash Patel <subash.rp@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
-rw-r--r--arch/arm/mach-exynos/include/mach/memory.h5
1 files changed, 5 insertions, 0 deletions
diff --git a/arch/arm/mach-exynos/include/mach/memory.h b/arch/arm/mach-exynos/include/mach/memory.h
index 374ef2cf7152..2a4cdb7cb326 100644
--- a/arch/arm/mach-exynos/include/mach/memory.h
+++ b/arch/arm/mach-exynos/include/mach/memory.h
@@ -15,8 +15,13 @@
#define PLAT_PHYS_OFFSET UL(0x40000000)
+#ifndef CONFIG_ARM_LPAE
/* Maximum of 256MiB in one bank */
#define MAX_PHYSMEM_BITS 32
#define SECTION_SIZE_BITS 28
+#else
+#define MAX_PHYSMEM_BITS 36
+#define SECTION_SIZE_BITS 31
+#endif
#endif /* __ASM_ARCH_MEMORY_H */