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authorStefan Agner <stefan@agner.ch>2018-07-12 09:39:03 +0200
committerUlf Hansson <ulf.hansson@linaro.org>2018-07-16 11:38:14 +0200
commite300149e580863b00a736b534c7163dcf0813641 (patch)
tree1f0aa7d2a7c23f22616a4862ec281f1cbeb17866
parent127407e36f4fe3a1d5e8b9998b479956ce83a7dc (diff)
mmc: tegra: fix eMMC DDR52 mode
Make sure the clock is doubled when using eMMC DDR52 mode. Signed-off-by: Stefan Agner <stefan@agner.ch> Tested-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
-rw-r--r--drivers/mmc/host/sdhci-tegra.c3
1 files changed, 2 insertions, 1 deletions
diff --git a/drivers/mmc/host/sdhci-tegra.c b/drivers/mmc/host/sdhci-tegra.c
index 5355d06d0a5e..e231c3e11bcd 100644
--- a/drivers/mmc/host/sdhci-tegra.c
+++ b/drivers/mmc/host/sdhci-tegra.c
@@ -228,7 +228,8 @@ static void tegra_sdhci_set_uhs_signaling(struct sdhci_host *host,
struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
struct sdhci_tegra *tegra_host = sdhci_pltfm_priv(pltfm_host);
- if (timing == MMC_TIMING_UHS_DDR50)
+ if (timing == MMC_TIMING_UHS_DDR50 ||
+ timing == MMC_TIMING_MMC_DDR52)
tegra_host->ddr_signaling = true;
sdhci_set_uhs_signaling(host, timing);