diff options
| author | Andrzej Hajda <a.hajda@samsung.com> | 2017-02-01 08:47:28 +0100 |
|---|---|---|
| committer | Archit Taneja <architt@codeaurora.org> | 2017-02-02 15:15:21 +0530 |
| commit | dd12312906b33053319cdc0bb5c247185d24bffe (patch) | |
| tree | b7e28777ad89147aaece206e1a26fddb0d9217fd | |
| parent | cbdded7f8a633ee9418047c50a7114ce2282b912 (diff) | |
drm/bridge/sii8620: simplify MHL3 mode setting
It is not necessary to set REG_COC_CTL0, REG_MHL_COC_CTL1 registers.
Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
Signed-off-by: Archit Taneja <architt@codeaurora.org>
Link: http://patchwork.freedesktop.org/patch/msgid/1485935272-17337-2-git-send-email-a.hajda@samsung.com
| -rw-r--r-- | drivers/gpu/drm/bridge/sil-sii8620.c | 8 |
1 files changed, 2 insertions, 6 deletions
diff --git a/drivers/gpu/drm/bridge/sil-sii8620.c b/drivers/gpu/drm/bridge/sil-sii8620.c index b2c267df7ee7..68cdf636c891 100644 --- a/drivers/gpu/drm/bridge/sil-sii8620.c +++ b/drivers/gpu/drm/bridge/sil-sii8620.c @@ -974,12 +974,8 @@ static void sii8620_set_mode(struct sii8620 *ctx, enum sii8620_mode mode) ); break; case CM_MHL3: - sii8620_write_seq_static(ctx, - REG_M3_CTRL, VAL_M3_CTRL_MHL3_VALUE, - REG_COC_CTL0, 0x40, - REG_MHL_COC_CTL1, 0x07 - ); - break; + sii8620_write(ctx, REG_M3_CTRL, VAL_M3_CTRL_MHL3_VALUE); + return; case CM_DISCONNECTED: break; default: |