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authorKevin Hilman <khilman@deeprootsystems.com>2009-05-11 11:04:53 -0700
committerKevin Hilman <khilman@deeprootsystems.com>2009-05-26 07:17:54 -0700
commitdc75602628472d7fbc4cb43f010bf0257e95ab71 (patch)
tree05632b60b16e7e3334ea5000620c8e8ece844a3c
parentdf4aab46a8256ac0f0c2701b3fe23b7dd05e6b48 (diff)
davinci: fixups for banked GPIO interrupt handling
This patch seems to get me much more reliable performance using the GPIO banked interrupts on dm355 for the dm9000 driver. Changes include: - init GPIO handling along with normal GPIO init - mask the level-sensitive bank IRQ during handling Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
-rw-r--r--arch/arm/mach-davinci/gpio.c4
1 files changed, 3 insertions, 1 deletions
diff --git a/arch/arm/mach-davinci/gpio.c b/arch/arm/mach-davinci/gpio.c
index 34ba4ceda347..40327b557d79 100644
--- a/arch/arm/mach-davinci/gpio.c
+++ b/arch/arm/mach-davinci/gpio.c
@@ -45,6 +45,7 @@ static struct gpio_controller __iomem * __init gpio2controller(unsigned gpio)
return __gpio_to_controller(gpio);
}
+static int __init davinci_gpio_irq_setup(void);
/*--------------------------------------------------------------------------*/
@@ -157,6 +158,7 @@ static int __init davinci_gpio_setup(void)
gpiochip_add(&chips[i].chip);
}
+ davinci_gpio_irq_setup();
return 0;
}
pure_initcall(davinci_gpio_setup);
@@ -238,6 +240,7 @@ gpio_irq_handler(unsigned irq, struct irq_desc *desc)
mask <<= 16;
/* temporarily mask (level sensitive) parent IRQ */
+ desc->chip->mask(irq);
desc->chip->ack(irq);
while (1) {
u32 status;
@@ -333,4 +336,3 @@ static int __init davinci_gpio_irq_setup(void)
return 0;
}
-arch_initcall(davinci_gpio_irq_setup);