diff options
author | Madhavan Srinivasan <maddy@linux.vnet.ibm.com> | 2017-01-09 19:00:15 +0530 |
---|---|---|
committer | Michael Ellerman <mpe@ellerman.id.au> | 2017-01-18 11:58:51 +1100 |
commit | d89f473ff6f84872e761419f7233d6e00f99c340 (patch) | |
tree | c701e96b545b2a16ce57f7a100a3684a00718cc1 | |
parent | 20717e1ff52672e31f9399c45d88936bbbc7e175 (diff) |
powerpc/perf: Fix PM_BRU_CMPL event code for power9
Use 0x10012 event code for PM_BRU_CMPL event in power9 event list
instead of current 0x40060.
Fixes: 34922527a2bcb ('powerpc/perf: Add power9 event list macros for generic and cache events')
Cc: stable@vger.kernel.org # v4.9+
Signed-off-by: Madhavan Srinivasan <maddy@linux.vnet.ibm.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
-rw-r--r-- | arch/powerpc/perf/power9-events-list.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/powerpc/perf/power9-events-list.h b/arch/powerpc/perf/power9-events-list.h index 6447dc1c3d89..929b56d47ad9 100644 --- a/arch/powerpc/perf/power9-events-list.h +++ b/arch/powerpc/perf/power9-events-list.h @@ -16,7 +16,7 @@ EVENT(PM_CYC, 0x0001e) EVENT(PM_ICT_NOSLOT_CYC, 0x100f8) EVENT(PM_CMPLU_STALL, 0x1e054) EVENT(PM_INST_CMPL, 0x00002) -EVENT(PM_BRU_CMPL, 0x40060) +EVENT(PM_BRU_CMPL, 0x10012) EVENT(PM_BR_MPRED_CMPL, 0x400f6) /* All L1 D cache load references counted at finish, gated by reject */ |