diff options
| author | Raul E Rangel <rrangel@chromium.org> | 2021-04-29 16:34:24 -0600 |
|---|---|---|
| committer | Linus Walleij <linus.walleij@linaro.org> | 2021-05-19 02:20:05 +0200 |
| commit | d62bd5ce12d79bcd6a6c3e4381daa7375dc21158 (patch) | |
| tree | 9e75465d992fbbd048e6e4abf7e5e093355c53b9 | |
| parent | ac5f8197d15cf37d7ae37ff5b6438abe6c8509a6 (diff) | |
pinctrl: amd: Implement irq_set_wake
This allows the OS to control which devices produce wake events.
$ grep enabled /sys/kernel/irq/*/wakeup
/sys/kernel/irq/24/wakeup:enabled
Signed-off-by: Raul E Rangel <rrangel@chromium.org>
Link: https://lore.kernel.org/r/20210429163341.1.I7631534622233689dd81410525e0dd617b9b2012@changeid
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| -rw-r--r-- | drivers/pinctrl/pinctrl-amd.c | 32 |
1 files changed, 31 insertions, 1 deletions
diff --git a/drivers/pinctrl/pinctrl-amd.c b/drivers/pinctrl/pinctrl-amd.c index 2d4acf21117c..03c0cf15df4a 100644 --- a/drivers/pinctrl/pinctrl-amd.c +++ b/drivers/pinctrl/pinctrl-amd.c @@ -438,6 +438,29 @@ static void amd_gpio_irq_unmask(struct irq_data *d) raw_spin_unlock_irqrestore(&gpio_dev->lock, flags); } +static int amd_gpio_irq_set_wake(struct irq_data *d, unsigned int on) +{ + u32 pin_reg; + unsigned long flags; + struct gpio_chip *gc = irq_data_get_irq_chip_data(d); + struct amd_gpio *gpio_dev = gpiochip_get_data(gc); + u32 wake_mask = BIT(WAKE_CNTRL_OFF_S0I3) | BIT(WAKE_CNTRL_OFF_S3) | + BIT(WAKE_CNTRL_OFF_S4); + + raw_spin_lock_irqsave(&gpio_dev->lock, flags); + pin_reg = readl(gpio_dev->base + (d->hwirq)*4); + + if (on) + pin_reg |= wake_mask; + else + pin_reg &= ~wake_mask; + + writel(pin_reg, gpio_dev->base + (d->hwirq)*4); + raw_spin_unlock_irqrestore(&gpio_dev->lock, flags); + + return 0; +} + static void amd_gpio_irq_eoi(struct irq_data *d) { u32 reg; @@ -552,9 +575,16 @@ static struct irq_chip amd_gpio_irqchip = { .irq_disable = amd_gpio_irq_disable, .irq_mask = amd_gpio_irq_mask, .irq_unmask = amd_gpio_irq_unmask, + .irq_set_wake = amd_gpio_irq_set_wake, .irq_eoi = amd_gpio_irq_eoi, .irq_set_type = amd_gpio_irq_set_type, - .flags = IRQCHIP_SKIP_SET_WAKE, + /* + * We need to set IRQCHIP_ENABLE_WAKEUP_ON_SUSPEND so that a wake event + * also generates an IRQ. We need the IRQ so the irq_handler can clear + * the wake event. Otherwise the wake event will never clear and + * prevent the system from suspending. + */ + .flags = IRQCHIP_ENABLE_WAKEUP_ON_SUSPEND, }; #define PIN_IRQ_PENDING (BIT(INTERRUPT_STS_OFF) | BIT(WAKE_STS_OFF)) |