diff options
author | Lee Jones <lee.jones@linaro.org> | 2014-07-11 13:54:00 +0200 |
---|---|---|
committer | Maxime Coquelin <maxime.coquelin@st.com> | 2014-10-31 09:59:06 +0100 |
commit | d436a609444b05beeced27cc30be88205c716d59 (patch) | |
tree | bf44d7e80b791ca94ac30ce5f573ccd517cc6c18 | |
parent | 0f6c28b7a49b14c91dd1ece6495b30508d5bb797 (diff) |
ARM: DT: STi: STiH416: Add DT node for MiPHY365x
The MiPHY365x is a Generic PHY which can serve various SATA or PCIe
devices. It has 2 ports which it can use for either; both SATA, both
PCIe or one of each in any configuration.
Acked-by: Mark Rutland <mark.rutland@arm.com>
Acked-by: Alexandre Torgue <alexandre.torgue@st.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
-rw-r--r-- | arch/arm/boot/dts/stih416-b2020.dts | 10 | ||||
-rw-r--r-- | arch/arm/boot/dts/stih416-b2020e.dts | 10 | ||||
-rw-r--r-- | arch/arm/boot/dts/stih416.dtsi | 22 |
3 files changed, 42 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/stih416-b2020.dts b/arch/arm/boot/dts/stih416-b2020.dts index d42ff1dcd89f..7ce798be5e01 100644 --- a/arch/arm/boot/dts/stih416-b2020.dts +++ b/arch/arm/boot/dts/stih416-b2020.dts @@ -19,5 +19,15 @@ bus-width = <8>; non-removable; }; + + miphy365x_phy: miphy365x@fe382000 { + phy_port0: port@fe382000 { + st,sata-gen = <3>; + }; + + phy_port1: port@fe38a000 { + st,pcie-tx-pol-inv; + }; + }; }; }; diff --git a/arch/arm/boot/dts/stih416-b2020e.dts b/arch/arm/boot/dts/stih416-b2020e.dts index a0434b6ae772..fa59224115bb 100644 --- a/arch/arm/boot/dts/stih416-b2020e.dts +++ b/arch/arm/boot/dts/stih416-b2020e.dts @@ -37,5 +37,15 @@ bus-width = <8>; non-removable; }; + + miphy365x_phy: miphy365x@fe382000 { + phy_port0: port@fe382000 { + st,sata-gen = <3>; + }; + + phy_port1: port@fe38a000 { + st,pcie-tx-pol-inv; + }; + }; }; }; diff --git a/arch/arm/boot/dts/stih416.dtsi b/arch/arm/boot/dts/stih416.dtsi index 28091548d915..a54f6832a9ac 100644 --- a/arch/arm/boot/dts/stih416.dtsi +++ b/arch/arm/boot/dts/stih416.dtsi @@ -9,6 +9,8 @@ #include "stih41x.dtsi" #include "stih416-clock.dtsi" #include "stih416-pinctrl.dtsi" + +#include <dt-bindings/phy/phy-miphy365x.h> #include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/reset-controller/stih416-resets.h> / { @@ -278,5 +280,25 @@ clock-names = "mmc"; clocks = <&clk_s_a1_ls 8>; }; + + miphy365x_phy: miphy365x@fe382000 { + compatible = "st,miphy365x-phy"; + st,syscfg = <&syscfg_rear>; + #address-cells = <1>; + #size-cells = <1>; + ranges; + + phy_port0: port@fe382000 { + #phy-cells = <1>; + reg = <0xfe382000 0x100>, <0xfe394000 0x100>, <0x824 0x4>; + reg-names = "sata", "pcie", "syscfg"; + }; + + phy_port1: port@fe38a000 { + #phy-cells = <1>; + reg = <0xfe38a000 0x100>, <0xfe804000 0x100>, <0x828 0x4>; + reg-names = "sata", "pcie", "syscfg"; + }; + }; }; }; |