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authorVille Syrjälä <ville.syrjala@linux.intel.com>2020-09-25 16:16:55 +0300
committerVille Syrjälä <ville.syrjala@linux.intel.com>2020-09-28 18:09:50 +0300
commitd0a9acaa6bc28ebefb5774d4d2eab484eae5c3fd (patch)
tree6fe07fe922333b112ed5ef7ff5bd61103b53412a
parent3d041e904b79c03dd7e74e50c193e8e3aac8d95f (diff)
drm/i915: Polish bdw_read_lut_10() a bit
Since bdw_read_lut_10() uses the auto-increment mode we must have an equal number of entries in the software LUT and the hardware LUT. WARN if that is not the case. Reviewed-by: Uma Shankar <uma.shankar@intel.com> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20200925131656.10022-9-ville.syrjala@linux.intel.com
-rw-r--r--drivers/gpu/drm/i915/display/intel_color.c7
1 files changed, 5 insertions, 2 deletions
diff --git a/drivers/gpu/drm/i915/display/intel_color.c b/drivers/gpu/drm/i915/display/intel_color.c
index 260bbbd5bbf2..290d1871ef57 100644
--- a/drivers/gpu/drm/i915/display/intel_color.c
+++ b/drivers/gpu/drm/i915/display/intel_color.c
@@ -1929,12 +1929,15 @@ static struct drm_property_blob *bdw_read_lut_10(struct intel_crtc *crtc,
{
struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
int i, hw_lut_size = ivb_lut_10_size(prec_index);
+ int lut_size = INTEL_INFO(dev_priv)->color.gamma_lut_size;
enum pipe pipe = crtc->pipe;
struct drm_property_blob *blob;
struct drm_color_lut *lut;
+ drm_WARN_ON(&dev_priv->drm, lut_size != hw_lut_size);
+
blob = drm_property_create_blob(&dev_priv->drm,
- sizeof(struct drm_color_lut) * hw_lut_size,
+ sizeof(struct drm_color_lut) * lut_size,
NULL);
if (IS_ERR(blob))
return NULL;
@@ -1944,7 +1947,7 @@ static struct drm_property_blob *bdw_read_lut_10(struct intel_crtc *crtc,
intel_de_write(dev_priv, PREC_PAL_INDEX(pipe),
prec_index | PAL_PREC_AUTO_INCREMENT);
- for (i = 0; i < hw_lut_size; i++) {
+ for (i = 0; i < lut_size; i++) {
u32 val = intel_de_read(dev_priv, PREC_PAL_DATA(pipe));
ilk_lut_10_pack(&lut[i], val);