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author | Damien Lespiau <damien.lespiau@intel.com> | 2014-03-30 16:28:23 +0100 |
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committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2014-09-24 14:51:59 +0200 |
commit | c3f59a67ad6ff5ac11fefc0c0d9d0f12ff7eb226 (patch) | |
tree | 54ef798a9b2bcc7cbf2701735b024bb9f55e8add | |
parent | 3fdcf80f75814fe2f28db43771b50f9aa70d43b6 (diff) |
drm/i915/skl: Allow the reg_read ioctl to return RCS_TIMESTAMP
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-rw-r--r-- | drivers/gpu/drm/i915/intel_uncore.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c index 918b76163965..3b27fb028762 100644 --- a/drivers/gpu/drm/i915/intel_uncore.c +++ b/drivers/gpu/drm/i915/intel_uncore.c @@ -968,7 +968,7 @@ static const struct register_whitelist { /* supported gens, 0x10 for 4, 0x30 for 4 and 5, etc. */ uint32_t gen_bitmask; } whitelist[] = { - { RING_TIMESTAMP(RENDER_RING_BASE), 8, GEN_RANGE(4, 8) }, + { RING_TIMESTAMP(RENDER_RING_BASE), 8, GEN_RANGE(4, 9) }, }; int i915_reg_read_ioctl(struct drm_device *dev, |