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author | Rafał Miłecki <zajec5@gmail.com> | 2016-04-08 12:23:46 +0200 |
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committer | Boris Brezillon <boris.brezillon@free-electrons.com> | 2016-04-19 22:05:32 +0200 |
commit | c1c7040e072caac6445a1e298bd1fc5e8da0a5f5 (patch) | |
tree | dee17c5beab4c924d29c2e8c3537d2788f618056 | |
parent | 050658c8f9bd8d7b2addf40f6a5b340d5d4ec21a (diff) |
mtd: nand: mxc: set ECC algorithm explicitly
This is part of process deprecating NAND_ECC_SOFT_BCH (and switching to
enum nand_ecc_algo).
Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
-rw-r--r-- | drivers/mtd/nand/mxc_nand.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/mtd/nand/mxc_nand.c b/drivers/mtd/nand/mxc_nand.c index 854c832597aa..57b1b74c8fa0 100644 --- a/drivers/mtd/nand/mxc_nand.c +++ b/drivers/mtd/nand/mxc_nand.c @@ -1585,6 +1585,7 @@ static int mxcnd_probe(struct platform_device *pdev) this->ecc.mode = NAND_ECC_HW; } else { this->ecc.mode = NAND_ECC_SOFT; + this->ecc.algo = NAND_ECC_HAMMING; } /* NAND bus width determines access functions used by upper layer */ |