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authorNathan Sullivan <nathan.sullivan@ni.com>2015-05-05 15:00:25 -0500
committerDavid S. Miller <davem@davemloft.net>2015-05-09 16:04:43 -0400
commitbfbb92c446700da645e4834fb01439097846ce1e (patch)
tree3d8905fe44be94dc7187af8c724320f42ecb3335
parentd3196a2468895c219a47f3c370713a4ca59c9f54 (diff)
net: macb: Handle the RXUBR interrupt on all devices
The same hardware issue the at91 must work around applies to at least the Zynq ethernet, and possibly more devices. The driver also needs to handle the RXUBR interrupt since it turns it on with MACB_RX_INT_FLAGS anyway. Signed-off-by: Nathan Sullivan <nathan.sullivan@ni.com> Signed-off-by: David S. Miller <davem@davemloft.net>
-rw-r--r--drivers/net/ethernet/cadence/macb.c11
1 files changed, 10 insertions, 1 deletions
diff --git a/drivers/net/ethernet/cadence/macb.c b/drivers/net/ethernet/cadence/macb.c
index 4104d49f005d..61aa570aad9a 100644
--- a/drivers/net/ethernet/cadence/macb.c
+++ b/drivers/net/ethernet/cadence/macb.c
@@ -981,7 +981,7 @@ static irqreturn_t macb_interrupt(int irq, void *dev_id)
struct macb_queue *queue = dev_id;
struct macb *bp = queue->bp;
struct net_device *dev = bp->dev;
- u32 status;
+ u32 status, ctrl;
status = queue_readl(queue, ISR);
@@ -1037,6 +1037,15 @@ static irqreturn_t macb_interrupt(int irq, void *dev_id)
* add that if/when we get our hands on a full-blown MII PHY.
*/
+ if (status & MACB_BIT(RXUBR)) {
+ ctrl = macb_readl(bp, NCR);
+ macb_writel(bp, NCR, ctrl & ~MACB_BIT(RE));
+ macb_writel(bp, NCR, ctrl | MACB_BIT(RE));
+
+ if (bp->caps & MACB_CAPS_ISR_CLEAR_ON_WRITE)
+ macb_writel(bp, ISR, MACB_BIT(RXUBR));
+ }
+
if (status & MACB_BIT(ISR_ROVR)) {
/* We missed at least one packet */
if (macb_is_gem(bp))