diff options
author | Leonard Crestez <leonard.crestez@nxp.com> | 2019-08-13 20:05:31 +0300 |
---|---|---|
committer | Shawn Guo <shawnguo@kernel.org> | 2019-08-19 13:54:40 +0200 |
commit | be378b600791044cdc9820fe0ae13efa9e5499aa (patch) | |
tree | 7ab0c5d031886ad48aca3e097f42df95b63e4ff0 | |
parent | b3d08a4b1e46cd8146eaf6d6cb3779f756f0b3f3 (diff) |
clk: imx8mn: Add GIC clock
This is enabled by default but if it's not explicitly defined and marked
as critical then its parent might get turned off.
Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
-rw-r--r-- | drivers/clk/imx/clk-imx8mn.c | 5 | ||||
-rw-r--r-- | include/dt-bindings/clock/imx8mn-clock.h | 3 |
2 files changed, 7 insertions, 1 deletions
diff --git a/drivers/clk/imx/clk-imx8mn.c b/drivers/clk/imx/clk-imx8mn.c index 106cc417c19b..3a71bb37c656 100644 --- a/drivers/clk/imx/clk-imx8mn.c +++ b/drivers/clk/imx/clk-imx8mn.c @@ -271,6 +271,10 @@ static const char * const imx8mn_usb_phy_sels[] = {"osc_24m", "sys_pll1_100m", " "sys_pll2_100m", "sys_pll2_200m", "clk_ext2", "clk_ext3", "audio_pll2_out", }; +static const char * const imx8mn_gic_sels[] = {"osc_24m", "sys_pll2_200m", "sys_pll1_40m", + "sys_pll2_100m", "sys_pll1_800m", "clk_ext2", + "clk_ext4", "audio_pll2_out" }; + static const char * const imx8mn_ecspi1_sels[] = {"osc_24m", "sys_pll2_200m", "sys_pll1_40m", "sys_pll1_160m", "sys_pll1_800m", "sys_pll3_out", "sys_pll2_250m", "audio_pll2_out", }; @@ -524,6 +528,7 @@ static int imx8mn_clocks_probe(struct platform_device *pdev) clks[IMX8MN_CLK_UART4] = imx8m_clk_composite("uart4", imx8mn_uart4_sels, base + 0xb080); clks[IMX8MN_CLK_USB_CORE_REF] = imx8m_clk_composite("usb_core_ref", imx8mn_usb_core_sels, base + 0xb100); clks[IMX8MN_CLK_USB_PHY_REF] = imx8m_clk_composite("usb_phy_ref", imx8mn_usb_phy_sels, base + 0xb180); + clks[IMX8MN_CLK_GIC] = imx8m_clk_composite_critical("gic", imx8mn_gic_sels, base + 0xb200); clks[IMX8MN_CLK_ECSPI1] = imx8m_clk_composite("ecspi1", imx8mn_ecspi1_sels, base + 0xb280); clks[IMX8MN_CLK_ECSPI2] = imx8m_clk_composite("ecspi2", imx8mn_ecspi2_sels, base + 0xb300); clks[IMX8MN_CLK_PWM1] = imx8m_clk_composite("pwm1", imx8mn_pwm1_sels, base + 0xb380); diff --git a/include/dt-bindings/clock/imx8mn-clock.h b/include/dt-bindings/clock/imx8mn-clock.h index 5255b1c2420e..d7b201652f4c 100644 --- a/include/dt-bindings/clock/imx8mn-clock.h +++ b/include/dt-bindings/clock/imx8mn-clock.h @@ -209,7 +209,8 @@ #define IMX8MN_CLK_ARM 191 #define IMX8MN_CLK_NAND_USDHC_BUS_RAWNAND_CLK 192 #define IMX8MN_CLK_GPU_CORE_ROOT 193 +#define IMX8MN_CLK_GIC 194 -#define IMX8MN_CLK_END 194 +#define IMX8MN_CLK_END 195 #endif |