diff options
author | Simon Horman <horms+renesas@verge.net.au> | 2017-04-18 10:03:18 +0900 |
---|---|---|
committer | Simon Horman <horms+renesas@verge.net.au> | 2017-05-22 14:54:31 +0200 |
commit | bdb3656e4c085de6f44b162554c2793492577834 (patch) | |
tree | facacf25abce5c6b83694663cb58ba628ceaeeff | |
parent | d2ae6fedc45a7fab6751987dfdc1b0faebe1ebb7 (diff) |
arm64: dts: m3ulcb: Fix EthernetAVB PHY timing
Set PHY rxc-skew-ps to 1500 and all other values to their default values.
This is intended to to address failures in the case of 1Gbps communication
using the salvator-x board with the KSZ9031RNX phy. This has been
reported to occur with both the r8a7795 (H3) and r8a7796 (M3-W) SoCs.
Based in a similar patch for the r8a7796 salvator-x by Kazuya Mizuguchi.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-rw-r--r-- | arch/arm64/boot/dts/renesas/r8a7796-m3ulcb.dts | 13 |
1 files changed, 1 insertions, 12 deletions
diff --git a/arch/arm64/boot/dts/renesas/r8a7796-m3ulcb.dts b/arch/arm64/boot/dts/renesas/r8a7796-m3ulcb.dts index c2a4549d3738..440d93e8388d 100644 --- a/arch/arm64/boot/dts/renesas/r8a7796-m3ulcb.dts +++ b/arch/arm64/boot/dts/renesas/r8a7796-m3ulcb.dts @@ -169,18 +169,7 @@ status = "okay"; phy0: ethernet-phy@0 { - rxc-skew-ps = <900>; - rxdv-skew-ps = <0>; - rxd0-skew-ps = <0>; - rxd1-skew-ps = <0>; - rxd2-skew-ps = <0>; - rxd3-skew-ps = <0>; - txc-skew-ps = <900>; - txen-skew-ps = <0>; - txd0-skew-ps = <0>; - txd1-skew-ps = <0>; - txd2-skew-ps = <0>; - txd3-skew-ps = <0>; + rxc-skew-ps = <1500>; reg = <0>; interrupt-parent = <&gpio2>; interrupts = <11 IRQ_TYPE_LEVEL_LOW>; |