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authorEvan Quan <evan.quan@amd.com>2020-09-25 14:20:56 +0800
committerAlex Deucher <alexander.deucher@amd.com>2020-10-27 11:59:45 -0400
commitbaa495f7643609545bd9f6391aa5b5d594a85817 (patch)
treec6814c82dd85092fc6dc9656b306fed5c98b3dfa
parent326d0ff7aa8b0e9b5bf310e7a5d095725f914675 (diff)
drm/amd/pm: correct smc voltage controller setup
Correct Polaris10 smc voltage controller setup. Signed-off-by: Evan Quan <evan.quan@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
-rw-r--r--drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c3
1 files changed, 2 insertions, 1 deletions
diff --git a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c
index 122b15dc76e1..7ec83a826816 100644
--- a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c
+++ b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c
@@ -237,7 +237,8 @@ static int smu7_get_current_pcie_lane_number(struct pp_hwmgr *hwmgr)
*/
static int smu7_enable_smc_voltage_controller(struct pp_hwmgr *hwmgr)
{
- if (hwmgr->chip_id == CHIP_VEGAM) {
+ if (hwmgr->chip_id >= CHIP_POLARIS10 &&
+ hwmgr->chip_id <= CHIP_VEGAM) {
PHM_WRITE_VFPF_INDIRECT_FIELD(hwmgr->device,
CGS_IND_REG__SMC, PWR_SVI2_PLANE1_LOAD, PSI1, 0);
PHM_WRITE_VFPF_INDIRECT_FIELD(hwmgr->device,