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authorFabrice Gasnier <fabrice.gasnier@st.com>2017-09-18 12:05:31 +0200
committerJonathan Cameron <Jonathan.Cameron@huawei.com>2017-09-24 13:09:57 +0100
commitb7a9776c1f9443326632486fcbd82dca82f8511e (patch)
treec189564527a6dd09e643d384d0d2c4e3443f8f5e
parent0a56eabc4e3f730782e4a9f3af4f60aa03a8a849 (diff)
iio: trigger: stm32-timer: fix a corner case to write preset
Balance timer start routine that sets ARPE: clear it in stop routine. This fixes a corner case, when timer is used successively as trigger (with sampling_frequency start/stop routines), then as a counter (with preset). Fixes: 93fbe91b5521 ("iio: Add STM32 timer trigger driver") Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com> Cc: <Stable@vger.kernel.org> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
-rw-r--r--drivers/iio/trigger/stm32-timer-trigger.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/iio/trigger/stm32-timer-trigger.c b/drivers/iio/trigger/stm32-timer-trigger.c
index 4cec28af3ecf..a30ba6e1dfec 100644
--- a/drivers/iio/trigger/stm32-timer-trigger.c
+++ b/drivers/iio/trigger/stm32-timer-trigger.c
@@ -174,6 +174,7 @@ static void stm32_timer_stop(struct stm32_timer_trigger *priv)
clk_disable(priv->clk);
/* Stop timer */
+ regmap_update_bits(priv->regmap, TIM_CR1, TIM_CR1_ARPE, 0);
regmap_update_bits(priv->regmap, TIM_CR1, TIM_CR1_CEN, 0);
regmap_write(priv->regmap, TIM_PSC, 0);
regmap_write(priv->regmap, TIM_ARR, 0);