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authorAndrew Murray <andrew.murray@arm.com>2019-11-04 11:12:39 -0700
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2019-11-04 21:57:51 +0100
commitb7909065e8ebaffd80375d01f5d151ff59b59ce6 (patch)
tree4ace7f0c3c96e52f648dd10c309527b529fff8f8
parentf188b5e76aae9f713c73708d2ba57b65953ce207 (diff)
dt-bindings: arm: coresight: Add support for coresight-loses-context-with-cpu
Some coresight components, because of choices made during hardware integration, require their state to be saved and restored across CPU low power states. The software has no reliable method of detecting when save/restore is required thus let's add a binding to inform the kernel. Signed-off-by: Andrew Murray <andrew.murray@arm.com> Reviewed-by: Mathieu Poirier <mathieu.poirier@linaro.org> Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Link: https://lore.kernel.org/r/20191104181251.26732-3-mathieu.poirier@linaro.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-rw-r--r--Documentation/devicetree/bindings/arm/coresight.txt9
1 files changed, 9 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/arm/coresight.txt b/Documentation/devicetree/bindings/arm/coresight.txt
index fcc3bacfd8bc..d02c42d21f2f 100644
--- a/Documentation/devicetree/bindings/arm/coresight.txt
+++ b/Documentation/devicetree/bindings/arm/coresight.txt
@@ -87,6 +87,15 @@ its hardware characteristcs.
* port or ports: see "Graph bindings for Coresight" below.
+* Optional properties for all components:
+
+ * arm,coresight-loses-context-with-cpu : boolean. Indicates that the
+ hardware will lose register context on CPU power down (e.g. CPUIdle).
+ An example of where this may be needed are systems which contain a
+ coresight component and CPU in the same power domain. When the CPU
+ powers down the coresight component also powers down and loses its
+ context. This property is currently only used for the ETM 4.x driver.
+
* Optional properties for ETM/PTMs:
* arm,cp14: must be present if the system accesses ETM/PTM management