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authorBenoit Cousson <b-cousson@ti.com>2010-12-21 21:08:13 -0700
committerPaul Walmsley <paul@pwsan.com>2010-12-21 21:08:13 -0700
commitae4b4fc1bb59ad8802800a8103a6519acadcc9cf (patch)
treec364a94cd7db4af526793de12349ef1961e9ec67
parentd9b98f5f9e20389c43370539ef3de4aba7cf1d79 (diff)
OMAP3: clock data: Add "wkup_clkdm" in sr1_fck and sr2_fck
The smartreflex modules belong to an ALWON_FCLK clock domain that does not have any SW control. The gating of that interface clock is triggered by a transition of the WKUP clock domain to idle. Attach both smartreflex instances on OMAP3 to the WKUP clock domain. The missing clock domain field in srX_fck clock nodes was reported by Kevin during the discussion about smartreflex on OMAP3: https://patchwork.kernel.org/patch/199342/ Signed-off-by: Benoit Cousson <b-cousson@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: Kevin Hilman <khilman@deeprootsystems.com>
-rw-r--r--arch/arm/mach-omap2/clock3xxx_data.c2
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/arm/mach-omap2/clock3xxx_data.c b/arch/arm/mach-omap2/clock3xxx_data.c
index a179edb03c13..b25171d9a387 100644
--- a/arch/arm/mach-omap2/clock3xxx_data.c
+++ b/arch/arm/mach-omap2/clock3xxx_data.c
@@ -3044,6 +3044,7 @@ static struct clk sr1_fck = {
.parent = &sys_ck,
.enable_reg = OMAP_CM_REGADDR(WKUP_MOD, CM_FCLKEN),
.enable_bit = OMAP3430_EN_SR1_SHIFT,
+ .clkdm_name = "wkup_clkdm",
.recalc = &followparent_recalc,
};
@@ -3054,6 +3055,7 @@ static struct clk sr2_fck = {
.parent = &sys_ck,
.enable_reg = OMAP_CM_REGADDR(WKUP_MOD, CM_FCLKEN),
.enable_bit = OMAP3430_EN_SR2_SHIFT,
+ .clkdm_name = "wkup_clkdm",
.recalc = &followparent_recalc,
};