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authorDamien Lespiau <damien.lespiau@intel.com>2014-03-26 16:55:46 +0000
committerDaniel Vetter <daniel.vetter@ffwll.ch>2014-09-24 14:57:28 +0200
commitacd5c3464038a550359433362055849e83351d89 (patch)
tree698bb657f448f69f99dedfbaa9bcc3591a2c7c36
parente7e7ea20297afae464bb7da69a2e4c67d1d2b354 (diff)
drm/i915/skl: Implement WaDisableSDEUnitClockGating:skl
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Signed-off-by: Damien Lespiau <damien.lespiau@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-rw-r--r--drivers/gpu/drm/i915/intel_pm.c8
1 files changed, 8 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index fa87f1ec44ec..81465e65e876 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -68,6 +68,14 @@
static void gen9_init_clock_gating(struct drm_device *dev)
{
+ struct drm_i915_private *dev_priv = dev->dev_private;
+
+ /*
+ * WaDisableSDEUnitClockGating:skl
+ * This seems to be a pre-production w/a.
+ */
+ I915_WRITE(GEN8_UCGCTL6, I915_READ(GEN8_UCGCTL6) |
+ GEN8_SDEUNIT_CLOCK_GATE_DISABLE);
}
static void i8xx_disable_fbc(struct drm_device *dev)