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author | Jisheng Zhang <Jisheng.Zhang@synaptics.com> | 2018-07-06 15:20:47 +0800 |
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committer | Ulf Hansson <ulf.hansson@linaro.org> | 2018-07-16 11:21:45 +0200 |
commit | aaadfa66908460bb4e29eb3904b3d386e6b1835f (patch) | |
tree | ff6a048dee925545dae81067bc7f4f22c1e00dd1 | |
parent | 1b5190c2e74c47ebe4bcecf7a072358ad9f1feaa (diff) |
dt: bindings: Add bindings for SDHCI Synopsys DWC MSHC
Synopsys SDHCI compatible DesignWare Cores Mobile Storage Host
Controller can support eMMC/SD/SDIO. Add the bindings.
Signed-off-by: Jisheng Zhang <Jisheng.Zhang@synaptics.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
-rw-r--r-- | Documentation/devicetree/bindings/mmc/sdhci-of-dwcmshc.txt | 20 |
1 files changed, 20 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/mmc/sdhci-of-dwcmshc.txt b/Documentation/devicetree/bindings/mmc/sdhci-of-dwcmshc.txt new file mode 100644 index 000000000000..ee4253b33be2 --- /dev/null +++ b/Documentation/devicetree/bindings/mmc/sdhci-of-dwcmshc.txt @@ -0,0 +1,20 @@ +* Synopsys DesignWare Cores Mobile Storage Host Controller + +Required properties: +- compatible: should be one of the following: + "snps,dwcmshc-sdhci" +- reg: offset and length of the register set for the device. +- interrupts: a single interrupt specifier. +- clocks: Array of clocks required for SDHCI; requires at least one for + core clock. +- clock-names: Array of names corresponding to clocks property; shall be + "core" for core clock and "bus" for optional bus clock. + +Example: + sdhci2: sdhci@aa0000 { + compatible = "snps,dwcmshc-sdhci"; + reg = <0xaa0000 0x1000>; + interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&emmcclk>; + bus-width = <8>; + } |