diff options
| author | Jerome Brunet <jbrunet@baylibre.com> | 2019-05-13 14:31:15 +0200 |
|---|---|---|
| committer | Jerome Brunet <jbrunet@baylibre.com> | 2019-05-20 12:20:51 +0200 |
| commit | a9f7b1993b709ffbbeeaeff232701639ca31ef95 (patch) | |
| tree | 2dbd6865816a47c258c89c2f11dec3584733fee8 | |
| parent | 19a18d42bf557b8420a55e0fce7be5aec9f8ef8c (diff) | |
clk: meson: g12a: add controller register init
Add the MPLL common register initial setting
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
| -rw-r--r-- | drivers/clk/meson/g12a.c | 8 |
1 files changed, 7 insertions, 1 deletions
diff --git a/drivers/clk/meson/g12a.c b/drivers/clk/meson/g12a.c index eda4990610c8..9df90bab9a84 100644 --- a/drivers/clk/meson/g12a.c +++ b/drivers/clk/meson/g12a.c @@ -2992,10 +2992,16 @@ static struct clk_regmap *const g12a_clk_regmaps[] = { &g12a_vdec_hevcf, }; +static const struct reg_sequence g12a_init_regs[] = { + { .reg = HHI_MPLL_CNTL0, .def = 0x00000543 }, +}; + static const struct meson_eeclkc_data g12a_clkc_data = { .regmap_clks = g12a_clk_regmaps, .regmap_clk_num = ARRAY_SIZE(g12a_clk_regmaps), - .hw_onecell_data = &g12a_hw_onecell_data + .hw_onecell_data = &g12a_hw_onecell_data, + .init_regs = g12a_init_regs, + .init_count = ARRAY_SIZE(g12a_init_regs), }; static const struct of_device_id clkc_match_table[] = { |