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authorBjorn Helgaas <bhelgaas@google.com>2016-10-06 13:34:24 -0500
committerBjorn Helgaas <bhelgaas@google.com>2016-10-12 00:08:25 -0500
commita458ce33d40fc0b1349c5c7eb07d349dca8af287 (patch)
tree76e12d8c8976b35ed708f6de65aa111eef5345a6
parent4368f096c4acb7252503661e8402203c4075fdb7 (diff)
PCI: hisi: Include register block base in PCIE_SYS_STATE4 address
Include the PCIE_HIP06_CTRL_OFF block base in the PCIE_SYS_STATE4 register address so reads of PCIE_SYS_STATE4 don't have to mention both. No functional change intended. Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
-rw-r--r--drivers/pci/host/pcie-hisi.c12
1 files changed, 6 insertions, 6 deletions
diff --git a/drivers/pci/host/pcie-hisi.c b/drivers/pci/host/pcie-hisi.c
index d0e081bdc7c4..b508aae06038 100644
--- a/drivers/pci/host/pcie-hisi.c
+++ b/drivers/pci/host/pcie-hisi.c
@@ -22,11 +22,11 @@
#include "pcie-designware.h"
-#define PCIE_LTSSM_LINKUP_STATE 0x11
-#define PCIE_LTSSM_STATE_MASK 0x3F
-#define PCIE_SUBCTRL_SYS_STATE4_REG 0x6818
-#define PCIE_SYS_STATE4 0x31c
-#define PCIE_HIP06_CTRL_OFF 0x1000
+#define PCIE_SUBCTRL_SYS_STATE4_REG 0x6818
+#define PCIE_HIP06_CTRL_OFF 0x1000
+#define PCIE_SYS_STATE4 (PCIE_HIP06_CTRL_OFF + 0x31c)
+#define PCIE_LTSSM_LINKUP_STATE 0x11
+#define PCIE_LTSSM_STATE_MASK 0x3F
#define to_hisi_pcie(x) container_of(x, struct hisi_pcie, pp)
@@ -108,7 +108,7 @@ static int hisi_pcie_link_up_hip06(struct hisi_pcie *hisi_pcie)
struct pcie_port *pp = &hisi_pcie->pp;
u32 val;
- val = dw_pcie_readl_rc(pp, PCIE_HIP06_CTRL_OFF + PCIE_SYS_STATE4);
+ val = dw_pcie_readl_rc(pp, PCIE_SYS_STATE4);
return ((val & PCIE_LTSSM_STATE_MASK) == PCIE_LTSSM_LINKUP_STATE);
}