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authorRichard Zhu <r65037@freescale.com>2014-10-27 13:17:32 +0800
committerBjorn Helgaas <bhelgaas@google.com>2014-10-29 10:11:54 -0600
commita2fa6f64c26aa0ea75b15116dd4a4f89bb5c869e (patch)
tree48c0faa3757189454a4fac12215794ddc8301ba2
parentc302d35eac32bbd99ed9e3dc5b03d58073c78e86 (diff)
PCI: imx6: Wait for clocks to stabilize after ref_en
For boards without a reset GPIO we skip the delay between enabling the pcie_ref_clk and touching the RC registers for configuration. This hangs the system if there isn't a proper delay to ensure the clocks are settled in the DW PCIe core. Also iMX6Q always needs an additional 10us delay to make sure the reset is propagated through the core, as we don't have an explicitly controlled reset input on this SoC. This fixes a problem with 3fce0e882f61 ("PCI: imx6: Delay enabling reference clock for SS until it stabilizes"): the kernel doesn't boot on systems that don't pass the PCI GPIO reset in the DTB. This regression affects mx6 nitrogen boards. [bhelgaas: add regression info in changelog] Fixes: 3fce0e882f61 ("PCI: imx6: Delay enabling reference clock for SS until it stabilizes") Reported-by: Fabio Estevam <fabio.estevam@freescale.com> Tested-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Richard Zhu <richard.zhu@freescale.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Lucas Stach <l.stach@pengutronix.de>
-rw-r--r--drivers/pci/host/pci-imx6.c13
1 files changed, 10 insertions, 3 deletions
diff --git a/drivers/pci/host/pci-imx6.c b/drivers/pci/host/pci-imx6.c
index 233fe8a88264..69202d1eb8fb 100644
--- a/drivers/pci/host/pci-imx6.c
+++ b/drivers/pci/host/pci-imx6.c
@@ -275,15 +275,22 @@ static int imx6_pcie_deassert_core_reset(struct pcie_port *pp)
goto err_pcie;
}
- /* allow the clocks to stabilize */
- usleep_range(200, 500);
-
/* power up core phy and enable ref clock */
regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR1,
IMX6Q_GPR1_PCIE_TEST_PD, 0 << 18);
+ /*
+ * the async reset input need ref clock to sync internally,
+ * when the ref clock comes after reset, internal synced
+ * reset time is too short, cannot meet the requirement.
+ * add one ~10us delay here.
+ */
+ udelay(10);
regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR1,
IMX6Q_GPR1_PCIE_REF_CLK_EN, 1 << 16);
+ /* allow the clocks to stabilize */
+ usleep_range(200, 500);
+
/* Some boards don't have PCIe reset GPIO. */
if (gpio_is_valid(imx6_pcie->reset_gpio)) {
gpio_set_value(imx6_pcie->reset_gpio, 0);