diff options
| author | Teresa Gámez <t.gamez@phytec.de> | 2011-04-14 11:39:57 -0300 |
|---|---|---|
| committer | Mauro Carvalho Chehab <mchehab@redhat.com> | 2011-05-20 12:07:04 -0300 |
| commit | a1de7a00ae6169973f188a2e6690e34d84613853 (patch) | |
| tree | cba24a86250169a269aa37f59c0a531294774e30 | |
| parent | d2dcad49bc346054b49bd40fd96f397fec695a0f (diff) | |
[media] V4L: mt9v022: fix pixel clock
The setup of the pixel clock is done wrong in the mt9v022 driver.
The 'Invert Pixel Clock' bit has to be set to 1 for falling edge
and not for rising. This is not clearly described in the data
sheet.
Tested on pcm037 and pcm027/pcm990.
Signed-off-by: Teresa Gámez <t.gamez@phytec.de>
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
| -rw-r--r-- | drivers/media/video/mt9v022.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/media/video/mt9v022.c b/drivers/media/video/mt9v022.c index e313d8390092..fc76ed1c08e5 100644 --- a/drivers/media/video/mt9v022.c +++ b/drivers/media/video/mt9v022.c @@ -228,7 +228,7 @@ static int mt9v022_set_bus_param(struct soc_camera_device *icd, flags = soc_camera_apply_sensor_flags(icl, flags); - if (flags & SOCAM_PCLK_SAMPLE_RISING) + if (flags & SOCAM_PCLK_SAMPLE_FALLING) pixclk |= 0x10; if (!(flags & SOCAM_HSYNC_ACTIVE_HIGH)) |