diff options
| author | Hans Verkuil <hans.verkuil@cisco.com> | 2014-01-31 10:32:15 -0300 |
|---|---|---|
| committer | Mauro Carvalho Chehab <m.chehab@samsung.com> | 2014-02-04 10:01:28 -0200 |
| commit | a1d16e0f59506d07935ec0a929a2c9f1d6d96077 (patch) | |
| tree | ccd3f2dd2e96a653959db5e176e0c70b74b1def9 | |
| parent | f5402007da542ec5a583e92b8b6e2a96d625b537 (diff) | |
[media] v4l2-dv-timings.h: add new 4K DMT resolutions
VESA added two new DMT timings in their latest standard document. Add these
to v4l2-dv-timings.h.
Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com>
Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
| -rw-r--r-- | include/uapi/linux/v4l2-dv-timings.h | 17 |
1 files changed, 17 insertions, 0 deletions
diff --git a/include/uapi/linux/v4l2-dv-timings.h b/include/uapi/linux/v4l2-dv-timings.h index be709fe29552..b6a5fe00a470 100644 --- a/include/uapi/linux/v4l2-dv-timings.h +++ b/include/uapi/linux/v4l2-dv-timings.h @@ -823,4 +823,21 @@ V4L2_DV_FL_REDUCED_BLANKING) \ } +/* 4K resolutions */ +#define V4L2_DV_BT_DMT_4096X2160P60_RB { \ + .type = V4L2_DV_BT_656_1120, \ + V4L2_INIT_BT_TIMINGS(4096, 2160, 0, V4L2_DV_HSYNC_POS_POL, \ + 556744000, 8, 32, 40, 48, 8, 6, 0, 0, 0, \ + V4L2_DV_BT_STD_DMT | V4L2_DV_BT_STD_CVT, \ + V4L2_DV_FL_REDUCED_BLANKING) \ +} + +#define V4L2_DV_BT_DMT_4096X2160P59_94_RB { \ + .type = V4L2_DV_BT_656_1120, \ + V4L2_INIT_BT_TIMINGS(4096, 2160, 0, V4L2_DV_HSYNC_POS_POL, \ + 556188000, 8, 32, 40, 48, 8, 6, 0, 0, 0, \ + V4L2_DV_BT_STD_DMT | V4L2_DV_BT_STD_CVT, \ + V4L2_DV_FL_REDUCED_BLANKING) \ +} + #endif |