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authorKevin McKinney <klmckinney1@gmail.com>2012-12-17 17:35:16 -0500
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2013-01-07 10:54:01 -0800
commit9f1c824ed01dd54fb14ea8542b60b79bc1c2d043 (patch)
treeb48a5155e4656a0efc62061aaceb6f33fa7803c7
parentf91d7665f8ed34b1c798ab1fe419a25573bb65bf (diff)
Staging: bcm: Fix all white space issues in target_params.h
This patch fixes all white space issues in target_parms.h as reported by checkpatch.pl. Signed-off-by: Kevin McKinney <klmckinney1@gmail.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-rw-r--r--drivers/staging/bcm/target_params.h116
1 files changed, 48 insertions, 68 deletions
diff --git a/drivers/staging/bcm/target_params.h b/drivers/staging/bcm/target_params.h
index ad7ec0054938..cff6a12ba289 100644
--- a/drivers/staging/bcm/target_params.h
+++ b/drivers/staging/bcm/target_params.h
@@ -3,79 +3,59 @@
typedef struct _TARGET_PARAMS
{
- B_UINT32 m_u32CfgVersion;
-
- // Scanning Related Params
- B_UINT32 m_u32CenterFrequency;
- B_UINT32 m_u32BandAScan;
- B_UINT32 m_u32BandBScan;
- B_UINT32 m_u32BandCScan;
-
-
- // QoS Params
- B_UINT32 m_u32ErtpsOptions;
-
- B_UINT32 m_u32PHSEnable;
-
-
- // HO Params
- B_UINT32 m_u32HoEnable;
-
- B_UINT32 m_u32HoReserved1;
- B_UINT32 m_u32HoReserved2;
- // Power Control Params
-
- B_UINT32 m_u32MimoEnable;
-
- B_UINT32 m_u32SecurityEnable;
-
- B_UINT32 m_u32PowerSavingModesEnable; //bit 1: 1 Idlemode enable; bit2: 1 Sleepmode Enable
- /* PowerSaving Mode Options:
- bit 0 = 1: CPE mode - to keep pcmcia if alive;
- bit 1 = 1: CINR reporting in Idlemode Msg
- bit 2 = 1: Default PSC Enable in sleepmode*/
- B_UINT32 m_u32PowerSavingModeOptions;
-
- B_UINT32 m_u32ArqEnable;
-
- // From Version #3, the HARQ section renamed as general
- B_UINT32 m_u32HarqEnable;
- // EEPROM Param Location
- B_UINT32 m_u32EEPROMFlag;
- // BINARY TYPE - 4th MSByte: Interface Type - 3rd MSByte: Vendor Type - 2nd MSByte
- // Unused - LSByte
- B_UINT32 m_u32Customize;
- B_UINT32 m_u32ConfigBW; /* In Hz */
- B_UINT32 m_u32ShutDownInitThresholdTimer;
-
- B_UINT32 m_u32RadioParameter;
- B_UINT32 m_u32PhyParameter1;
- B_UINT32 m_u32PhyParameter2;
- B_UINT32 m_u32PhyParameter3;
-
- B_UINT32 m_u32TestOptions; // in eval mode only; lower 16bits = basic cid for testing; then bit 16 is test cqich,bit 17 test init rang; bit 18 test periodic rang and bit 19 is test harq ack/nack
-
+ B_UINT32 m_u32CfgVersion;
+ // Scanning Related Params
+ B_UINT32 m_u32CenterFrequency;
+ B_UINT32 m_u32BandAScan;
+ B_UINT32 m_u32BandBScan;
+ B_UINT32 m_u32BandCScan;
+ // QoS Params
+ B_UINT32 m_u32ErtpsOptions;
+ B_UINT32 m_u32PHSEnable;
+ // HO Params
+ B_UINT32 m_u32HoEnable;
+ B_UINT32 m_u32HoReserved1;
+ B_UINT32 m_u32HoReserved2;
+ // Power Control Params
+ B_UINT32 m_u32MimoEnable;
+ B_UINT32 m_u32SecurityEnable;
+ B_UINT32 m_u32PowerSavingModesEnable; //bit 1: 1 Idlemode enable; bit2: 1 Sleepmode Enable
+ /* PowerSaving Mode Options:
+ bit 0 = 1: CPE mode - to keep pcmcia if alive;
+ bit 1 = 1: CINR reporting in Idlemode Msg
+ bit 2 = 1: Default PSC Enable in sleepmode*/
+ B_UINT32 m_u32PowerSavingModeOptions;
+ B_UINT32 m_u32ArqEnable;
+ // From Version #3, the HARQ section renamed as general
+ B_UINT32 m_u32HarqEnable;
+ // EEPROM Param Location
+ B_UINT32 m_u32EEPROMFlag;
+ // BINARY TYPE - 4th MSByte: Interface Type - 3rd MSByte: Vendor Type - 2nd MSByte
+ // Unused - LSByte
+ B_UINT32 m_u32Customize;
+ B_UINT32 m_u32ConfigBW; /* In Hz */
+ B_UINT32 m_u32ShutDownInitThresholdTimer;
+ B_UINT32 m_u32RadioParameter;
+ B_UINT32 m_u32PhyParameter1;
+ B_UINT32 m_u32PhyParameter2;
+ B_UINT32 m_u32PhyParameter3;
+ B_UINT32 m_u32TestOptions; // in eval mode only; lower 16bits = basic cid for testing; then bit 16 is test cqich,bit 17 test init rang; bit 18 test periodic rang and bit 19 is test harq ack/nack
B_UINT32 m_u32MaxMACDataperDLFrame;
B_UINT32 m_u32MaxMACDataperULFrame;
-
B_UINT32 m_u32Corr2MacFlags;
-
- //adding driver params.
+ //adding driver params.
B_UINT32 HostDrvrConfig1;
- B_UINT32 HostDrvrConfig2;
- B_UINT32 HostDrvrConfig3;
- B_UINT32 HostDrvrConfig4;
- B_UINT32 HostDrvrConfig5;
- B_UINT32 HostDrvrConfig6;
- B_UINT32 m_u32SegmentedPUSCenable;
-
+ B_UINT32 HostDrvrConfig2;
+ B_UINT32 HostDrvrConfig3;
+ B_UINT32 HostDrvrConfig4;
+ B_UINT32 HostDrvrConfig5;
+ B_UINT32 HostDrvrConfig6;
+ B_UINT32 m_u32SegmentedPUSCenable;
// removed SHUT down related 'unused' params from here to sync 4.x and 5.x CFG files..
-
- //BAMC Related Parameters
- //Bit 0-15 Band AMC signaling configuration: Bit 1 = 1 – Enable Band AMC signaling.
- //bit 16-31 Band AMC Data configuration: Bit 16 = 1 – Band AMC 2x3 support.
+ //BAMC Related Parameters
+ //Bit 0-15 Band AMC signaling configuration: Bit 1 = 1 – Enable Band AMC signaling.
+ //bit 16-31 Band AMC Data configuration: Bit 16 = 1 – Band AMC 2x3 support.
B_UINT32 m_u32BandAMCEnable;
-
-} stTargetParams,TARGET_PARAMS,*PTARGET_PARAMS, STARGETPARAMS, *PSTARGETPARAMS;
+} stTargetParams, TARGET_PARAMS, *PTARGET_PARAMS, STARGETPARAMS, *PSTARGETPARAMS;
#endif