diff options
| author | Linus Walleij <linus.walleij@linaro.org> | 2016-08-29 11:29:31 +0200 |
|---|---|---|
| committer | Tomi Valkeinen <tomi.valkeinen@ti.com> | 2016-08-30 11:37:25 +0300 |
| commit | 9986908d38736ad6fde46c9b8f651d6c82da07b9 (patch) | |
| tree | a87e019a2c2e18c926a2cb01426fe0abfcd0f307 | |
| parent | 763e6366f3700e2f34a94e71bfec67dea7e37b68 (diff) | |
video: ARM CLCD: fix up Integrator support
We need to mask all registers of the Integrator/CP core module
control register, and actually write the calculated value to the
control register, not the mask.
Tested on the Integrator/CP with RGB5551 VGA and works like a
charm after this patch.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
| -rw-r--r-- | drivers/video/fbdev/amba-clcd-versatile.c | 10 |
1 files changed, 7 insertions, 3 deletions
diff --git a/drivers/video/fbdev/amba-clcd-versatile.c b/drivers/video/fbdev/amba-clcd-versatile.c index 56161f98ad7e..d4ae30b93bf4 100644 --- a/drivers/video/fbdev/amba-clcd-versatile.c +++ b/drivers/video/fbdev/amba-clcd-versatile.c @@ -262,7 +262,10 @@ static const struct of_device_id versatile_clcd_of_match[] = { /* 0 = 24bit VGA, 1 = 18bit VGA */ #define INTEGRATOR_CLCD_LCD_N24BITEN BIT(19) -#define INTEGRATOR_CLCD_MASK (INTEGRATOR_CLCD_LCDMUX_MASK | \ +#define INTEGRATOR_CLCD_MASK (INTEGRATOR_CLCD_LCDBIASEN | \ + INTEGRATOR_CLCD_LCDBIASUP | \ + INTEGRATOR_CLCD_LCDBIASDN | \ + INTEGRATOR_CLCD_LCDMUX_MASK | \ INTEGRATOR_CLCD_LCD0_EN | \ INTEGRATOR_CLCD_LCD1_EN | \ INTEGRATOR_CLCD_LCD_STATIC1 | \ @@ -277,6 +280,7 @@ static void integrator_clcd_enable(struct clcd_fb *fb) dev_info(&fb->dev->dev, "enable Integrator CLCD connectors\n"); + /* FIXME: really needed? */ val = INTEGRATOR_CLCD_LCD_STATIC1 | INTEGRATOR_CLCD_LCD_STATIC2 | INTEGRATOR_CLCD_LCD0_EN | INTEGRATOR_CLCD_LCD1_EN; if (var->bits_per_pixel <= 8 || @@ -291,8 +295,8 @@ static void integrator_clcd_enable(struct clcd_fb *fb) regmap_update_bits(versatile_syscon_map, INTEGRATOR_HDR_CTRL_OFFSET, - 0, - INTEGRATOR_CLCD_MASK); + INTEGRATOR_CLCD_MASK, + val); } /* |