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authorPaul Walmsley <paul@pwsan.com>2009-04-23 21:11:08 -0600
committerpaul <paul@twilight.(none)>2009-04-23 21:11:08 -0600
commit9198a40620fc69d577e854fb571e76af3313bc53 (patch)
tree454e51cc8a82d2cccf0203a49f2905f441d6cffb
parentd53eb73795c55101453ea6ca4f486ea2ff7b0496 (diff)
OMAP3 GPTIMER: fix GPTIMER12 IRQ
GPTIMER12 IRQ is at IRQ 95 on OMAP3, unlike OMAP2. (ref: OMAP34xx Multimedia High Security (HS) Device Silicon Revision 3.0 Security Addendum Rev. B, SWPU119B) Signed-off-by: Paul Walmsley <paul@pwsan.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
-rw-r--r--arch/arm/plat-omap/dmtimer.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/plat-omap/dmtimer.c b/arch/arm/plat-omap/dmtimer.c
index bfd47570cc91..c99d611242a9 100644
--- a/arch/arm/plat-omap/dmtimer.c
+++ b/arch/arm/plat-omap/dmtimer.c
@@ -238,7 +238,7 @@ static struct omap_dm_timer omap3_dm_timers[] = {
{ .phys_base = 0x49040000, .irq = INT_24XX_GPTIMER9 },
{ .phys_base = 0x48086000, .irq = INT_24XX_GPTIMER10 },
{ .phys_base = 0x48088000, .irq = INT_24XX_GPTIMER11 },
- { .phys_base = 0x48304000, .irq = INT_24XX_GPTIMER12 },
+ { .phys_base = 0x48304000, .irq = INT_34XX_GPT12_IRQ },
};
static const char *omap3_dm_source_names[] __initdata = {