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authorCharlene Liu <charlene.liu@amd.com>2017-06-05 16:54:33 -0400
committerAlex Deucher <alexander.deucher@amd.com>2017-09-26 18:07:51 -0400
commit909e8c9e417945f313b68ed6c5a559fe5266be8b (patch)
treef5cd1d00de4a2387ddbdf843d0985fdbe3bf6616
parentfc82c5cb306d6f201cdee2c4c092ff49c6929634 (diff)
drm/amd/display: fix single link black screen
Don't fall back to dual link DVI mode if the connector is single Link only. Signed-off-by: Charlene Liu <charlene.liu@amd.com> Reviewed-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
-rw-r--r--drivers/gpu/drm/amd/display/dc/core/dc_resource.c4
1 files changed, 3 insertions, 1 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_resource.c b/drivers/gpu/drm/amd/display/dc/core/dc_resource.c
index e4a6636fd829..b7f31b985b4f 100644
--- a/drivers/gpu/drm/amd/display/dc/core/dc_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc_resource.c
@@ -1204,6 +1204,7 @@ bool resource_validate_attach_surfaces(
/* Maximum TMDS single link pixel clock 165MHz */
#define TMDS_MAX_PIXEL_CLOCK_IN_KHZ 165000
+#define TMDS_MAX_PIXEL_CLOCK_IN_KHZ_UPMOST 297000
static void set_stream_engine_in_use(
struct resource_context *res_ctx,
@@ -1331,7 +1332,8 @@ static void update_stream_signal(struct core_stream *stream)
}
if (dc_is_dvi_signal(stream->signal)) {
- if (stream->public.timing.pix_clk_khz > TMDS_MAX_PIXEL_CLOCK_IN_KHZ)
+ if (stream->public.timing.pix_clk_khz > TMDS_MAX_PIXEL_CLOCK_IN_KHZ_UPMOST &&
+ stream->public.sink->sink_signal != SIGNAL_TYPE_DVI_SINGLE_LINK)
stream->signal = SIGNAL_TYPE_DVI_DUAL_LINK;
else
stream->signal = SIGNAL_TYPE_DVI_SINGLE_LINK;