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author | Alexandre Demers <alexandre.f.demers@gmail.com> | 2016-06-22 23:31:29 -0400 |
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committer | Alex Deucher <alexander.deucher@amd.com> | 2016-07-07 15:06:01 -0400 |
commit | 880a076cdefe7f345d25e462cd327bea9ff81831 (patch) | |
tree | 4faf11d8f72b597259e39a13b4b7ffd8ba1cb651 | |
parent | 023efca25115340a635d79d9cdbce83e63313871 (diff) |
drm/amd/powerplay: fix typos in comment in polaris' hwmgr
Signed-off-by: Alexandre Demers <alexandre.f.demers@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
-rw-r--r-- | drivers/gpu/drm/amd/powerplay/hwmgr/polaris10_hwmgr.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/polaris10_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/polaris10_hwmgr.c index b3bc8fb42de5..c2b05af05780 100644 --- a/drivers/gpu/drm/amd/powerplay/hwmgr/polaris10_hwmgr.c +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/polaris10_hwmgr.c @@ -1404,9 +1404,9 @@ static int polaris10_populate_all_memory_levels(struct pp_hwmgr *hwmgr) return result; } - /* in order to prevent MC activity from stutter mode to push DPM up. + /* In order to prevent MC activity from stutter mode to push DPM up, * the UVD change complements this by putting the MCLK in - * a higher state by default such that we are not effected by + * a higher state by default such that we are not affected by * up threshold or and MCLK DPM latency. */ levels[0].ActivityLevel = 0x1f; |