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authorMartin Bugge <marbugge@cisco.com>2014-01-24 10:50:04 -0300
committerMauro Carvalho Chehab <m.chehab@samsung.com>2014-02-04 09:57:00 -0200
commit81ba0a4e0ba4f92573440b8c455fc0d30f111092 (patch)
tree64d039d7a72576723508a6330360b235565312da
parent933913da020d0a6099e00fbb652fb682996fba45 (diff)
[media] adv7842: pixelclock read-out
Incorrect registers used for pixelclock read-out. Same registers as for adv7604 which actually gave an almost correct read-out, even they are not documented for adv7842. Corrected deep-color pixel-clock correction. Signed-off-by: Martin Bugge <marbugge@cisco.com> Cc: Mats Randgaard <matrandg@cisco.com> Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com> Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
-rw-r--r--drivers/media/i2c/adv7842.c7
1 files changed, 3 insertions, 4 deletions
diff --git a/drivers/media/i2c/adv7842.c b/drivers/media/i2c/adv7842.c
index f7a4d79ea991..3aa1a7c750f1 100644
--- a/drivers/media/i2c/adv7842.c
+++ b/drivers/media/i2c/adv7842.c
@@ -1449,12 +1449,11 @@ static int adv7842_query_dv_timings(struct v4l2_subdev *sd,
bt->width = (hdmi_read(sd, 0x07) & 0x0f) * 256 + hdmi_read(sd, 0x08);
bt->height = (hdmi_read(sd, 0x09) & 0x0f) * 256 + hdmi_read(sd, 0x0a);
- freq = (hdmi_read(sd, 0x06) * 1000000) +
- ((hdmi_read(sd, 0x3b) & 0x30) >> 4) * 250000;
-
+ freq = ((hdmi_read(sd, 0x51) << 1) + (hdmi_read(sd, 0x52) >> 7)) * 1000000;
+ freq += ((hdmi_read(sd, 0x52) & 0x7f) * 7813);
if (is_hdmi(sd)) {
/* adjust for deep color mode */
- freq = freq * 8 / (((hdmi_read(sd, 0x0b) & 0xc0) >> 5) + 8);
+ freq = freq * 8 / (((hdmi_read(sd, 0x0b) & 0xc0) >> 6) * 2 + 8);
}
bt->pixelclock = freq;
bt->hfrontporch = (hdmi_read(sd, 0x20) & 0x03) * 256 +