diff options
author | Krzysztof Kozlowski <krzk@kernel.org> | 2020-07-24 20:23:16 +0200 |
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committer | Krzysztof Kozlowski <krzk@kernel.org> | 2020-07-27 11:13:33 +0200 |
commit | 80c4f5a824cb24902edc5345919b0f0870584cdf (patch) | |
tree | 2a6856157d4d802a71d750522cf4869c4040c6d0 | |
parent | 0abbec7eed5b945922ef682bcb1a1576f684fe5e (diff) |
memory: omap-gpmc: Correct kerneldoc
Use proper kerneldoc to fix GCC warnings like:
drivers/memory/omap-gpmc.c:299: warning: Function parameter or member 'cs' not described in 'gpmc_get_clk_period'
drivers/memory/omap-gpmc.c:432: warning: Excess function parameter 'ma' description in 'get_gpmc_timing_reg'
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
-rw-r--r-- | drivers/memory/omap-gpmc.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/drivers/memory/omap-gpmc.c b/drivers/memory/omap-gpmc.c index 896f3368a194..256d45e58838 100644 --- a/drivers/memory/omap-gpmc.c +++ b/drivers/memory/omap-gpmc.c @@ -292,8 +292,8 @@ static unsigned long gpmc_get_fclk_period(void) /** * gpmc_get_clk_period - get period of selected clock domain in ps - * @cs Chip Select Region. - * @cd Clock Domain. + * @cs: Chip Select Region. + * @cd: Clock Domain. * * GPMC_CS_CONFIG1 GPMCFCLKDIVIDER for cs has to be setup * prior to calling this function with GPMC_CD_CLK. @@ -412,7 +412,7 @@ static void gpmc_cs_bool_timings(int cs, const struct gpmc_bool_timings *p) * @reg: GPMC_CS_CONFIGn register offset. * @st_bit: Start Bit * @end_bit: End Bit. Must be >= @st_bit. - * @ma:x Maximum parameter value (before optional @shift). + * @max: Maximum parameter value (before optional @shift). * If 0, maximum is as high as @st_bit and @end_bit allow. * @name: DTS node name, w/o "gpmc," * @cd: Clock Domain of timing parameter. @@ -1088,7 +1088,7 @@ static struct gpmc_nand_ops nand_ops = { /** * gpmc_omap_get_nand_ops - Get the GPMC NAND interface - * @regs: the GPMC NAND register map exclusive for NAND use. + * @reg: the GPMC NAND register map exclusive for NAND use. * @cs: GPMC chip select number on which the NAND sits. The * register map returned will be specific to this chip select. * |