diff options
| author | Eryk Brol <eryk.brol@amd.com> | 2019-04-15 16:09:01 -0400 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2019-06-22 09:34:11 -0500 |
| commit | 7fad39ca4a1cd721864a3b7da19b2489e73dbf42 (patch) | |
| tree | dafb6f0e765ad2e144e373f988c22cbc23fd4ba3 | |
| parent | 78b674573a552f046322d70b943349c133241e04 (diff) | |
drm/amd/display: Change DCN2 vupdate start programming
[Why]
In order to ensure that incoming flips are latched and
complete immediately, we need to program the vupdate
interrupt to come during the back porch of each frame.
[How]
Program the vupdate start_line to be in the back porch
like it's done for DCN1.
Signed-off-by: Eryk Brol <eryk.brol@amd.com>
Reviewed-by: Aric Cyr <Aric.Cyr@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| -rw-r--r-- | drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c | 9 |
1 files changed, 3 insertions, 6 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c index e7580e6e0fb6..f9eae47f7be3 100644 --- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c +++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c @@ -1704,13 +1704,10 @@ void dcn20_unblank_stream(struct pipe_ctx *pipe_ctx, void dcn20_setup_vupdate_interrupt(struct pipe_ctx *pipe_ctx) { struct timing_generator *tg = pipe_ctx->stream_res.tg; - int start_position = get_vupdate_offset_from_vsync(pipe_ctx); - uint32_t start_line; + int start_line = get_vupdate_offset_from_vsync(pipe_ctx); - if (start_position < 0) - start_line = pipe_ctx->stream->timing.v_total + start_position - 1; - else - start_line = start_position; + if (start_line < 0) + start_line = 0; if (tg->funcs->setup_vertical_interrupt2) tg->funcs->setup_vertical_interrupt2(tg, start_line); |