diff options
| author | Andreas Schwab <schwab@suse.de> | 2018-10-23 09:33:47 +0200 |
|---|---|---|
| committer | Palmer Dabbelt <palmer@sifive.com> | 2018-10-31 12:13:43 -0700 |
| commit | 732e8e4130ffccb618390e0f80a884543e61fd61 (patch) | |
| tree | 49654d9e8c7afcb00c220a99262f6f3faf7df857 | |
| parent | d26c4bbf992463c043fdee4b3e5efa3f08990862 (diff) | |
RISC-V: properly determine hardware caps
On the Hifive-U platform, cpu 0 is a masked cpu with less capabilities
than the other cpus. Ignore it for the purpose of determining the
hardware capabilities of the system.
Signed-off-by: Andreas Schwab <schwab@suse.de>
Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
| -rw-r--r-- | arch/riscv/kernel/cpufeature.c | 8 |
1 files changed, 5 insertions, 3 deletions
diff --git a/arch/riscv/kernel/cpufeature.c b/arch/riscv/kernel/cpufeature.c index 5493f3228704..0339087aa652 100644 --- a/arch/riscv/kernel/cpufeature.c +++ b/arch/riscv/kernel/cpufeature.c @@ -28,7 +28,7 @@ bool has_fpu __read_mostly; void riscv_fill_hwcap(void) { - struct device_node *node; + struct device_node *node = NULL; const char *isa; size_t i; static unsigned long isa2hwcap[256] = {0}; @@ -44,9 +44,11 @@ void riscv_fill_hwcap(void) /* * We don't support running Linux on hertergenous ISA systems. For - * now, we just check the ISA of the first processor. + * now, we just check the ISA of the first "okay" processor. */ - node = of_find_node_by_type(NULL, "cpu"); + while ((node = of_find_node_by_type(node, "cpu"))) + if (riscv_of_processor_hartid(node) >= 0) + break; if (!node) { pr_warning("Unable to find \"cpu\" devicetree entry"); return; |