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authorMarcin Wojtas <mw@semihalf.com>2021-01-12 11:46:53 +0200
committerUlf Hansson <ulf.hansson@linaro.org>2021-02-01 11:54:45 +0100
commit7214d79237df4d4e3b40e5c1763698e21393da16 (patch)
tree6b9c3ffcbfceab273433ee8a717806af8f0e254f
parent783be176eb2775447b6f6254ecf2e3499334941a (diff)
mmc: xenon: add AP807 compatible string
This patch adds new compatible string to differentiate between the controllers versions included in the AP807 north bridge. Thanks to this change, the SoCs which use AP807 will not run unintentionally in the 'slow mode' with disabled UHS modes. Signed-off-by: Marcin Wojtas <mw@semihalf.com> Signed-off-by: Konstantin Porotchkin <kostap@marvell.com> Link: https://lore.kernel.org/r/20210112094655.12274-3-kostap@marvell.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
-rw-r--r--drivers/mmc/host/sdhci-xenon.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/mmc/host/sdhci-xenon.c b/drivers/mmc/host/sdhci-xenon.c
index d19eef5f725f..666cee4c7f7c 100644
--- a/drivers/mmc/host/sdhci-xenon.c
+++ b/drivers/mmc/host/sdhci-xenon.c
@@ -689,6 +689,7 @@ static const struct dev_pm_ops sdhci_xenon_dev_pm_ops = {
static const struct of_device_id sdhci_xenon_dt_ids[] = {
{ .compatible = "marvell,armada-ap806-sdhci", .data = (void *)XENON_AP806},
+ { .compatible = "marvell,armada-ap807-sdhci", .data = (void *)XENON_AP807},
{ .compatible = "marvell,armada-cp110-sdhci", .data = (void *)XENON_CP110},
{ .compatible = "marvell,armada-3700-sdhci", .data = (void *)XENON_A3700},
{}