diff options
| author | Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> | 2016-08-20 01:18:54 +0300 |
|---|---|---|
| committer | Simon Horman <horms+renesas@verge.net.au> | 2016-08-23 09:33:25 +0200 |
| commit | 5c2312ba0596224653580cbd0a89d07fe63cd057 (patch) | |
| tree | 187b10d06b8881f01e84f2034634e4ad74e8c22b | |
| parent | a66f74f464fb1e501d1b448c99e8f9ae4e64da2b (diff) | |
ARM: dts: r8a7792: add VSP1V clocks
Describe the VSP1V clocks in the R8A7792 device tree.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| -rw-r--r-- | arch/arm/boot/dts/r8a7792.dtsi | 11 |
1 files changed, 8 insertions, 3 deletions
diff --git a/arch/arm/boot/dts/r8a7792.dtsi b/arch/arm/boot/dts/r8a7792.dtsi index 9763289db5ce..856e6c5b94bc 100644 --- a/arch/arm/boot/dts/r8a7792.dtsi +++ b/arch/arm/boot/dts/r8a7792.dtsi @@ -757,10 +757,15 @@ compatible = "renesas,r8a7792-mstp-clocks", "renesas,cpg-mstp-clocks"; reg = <0 0xe6150134 0 4>, <0 0xe6150038 0 4>; - clocks = <&m2_clk>; + clocks = <&m2_clk>, <&zs_clk>, <&zs_clk>, <&zs_clk>; #clock-cells = <1>; - clock-indices = <R8A7792_CLK_JPU>; - clock-output-names = "jpu"; + clock-indices = < + R8A7792_CLK_JPU + R8A7792_CLK_VSP1DU1 R8A7792_CLK_VSP1DU0 + R8A7792_CLK_VSP1_SY + >; + clock-output-names = "jpu", "vsp1du1", "vsp1du0", + "vsp1-sy"; }; mstp2_clks: mstp2_clks@e6150138 { compatible = "renesas,r8a7792-mstp-clocks", |