diff options
| author | Wang Zhenyu <zhenyu.z.wang@intel.com> | 2007-04-10 09:42:48 +0800 |
|---|---|---|
| committer | Dave Jones <davej@redhat.com> | 2007-04-09 22:09:58 -0400 |
| commit | 52ea0718ea506df0915eacedb439e65c5f214e0e (patch) | |
| tree | 01e68ba08924faa8b458159c861b394a6f8053ad | |
| parent | 4598af33d9143942f00cf7692b247027aba35316 (diff) | |
[AGPGART] intel_agp: fix G965 GTT size detect
On G965, I810_PGETBL_CTL is a mmio offset, but we wrongly take it
as pci config space offset in detecting GTT size. This one line patch
fixs this.
Signed-off-by: Wang Zhenyu <zhenyu.z.wang@intel.com>
Signed-off-by: Dave Jones <davej@redhat.com>
| -rw-r--r-- | drivers/char/agp/intel-agp.c | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/drivers/char/agp/intel-agp.c b/drivers/char/agp/intel-agp.c index a9fdbf9126ca..55392a45a14b 100644 --- a/drivers/char/agp/intel-agp.c +++ b/drivers/char/agp/intel-agp.c @@ -431,9 +431,8 @@ static void intel_i830_init_gtt_entries(void) if (IS_I965) { u32 pgetbl_ctl; + pgetbl_ctl = readl(intel_i830_private.registers+I810_PGETBL_CTL); - pci_read_config_dword(agp_bridge->dev, I810_PGETBL_CTL, - &pgetbl_ctl); /* The 965 has a field telling us the size of the GTT, * which may be larger than what is necessary to map the * aperture. |